All News

2023

  • Jan 2023: Paper on supporting dynamic task parallelism on manycore architectures with software-managed scratchpad memories (in collaboration with our colleagues at the University of Washington) accepted for publication in the ACM Int'l Conf. on Architectural Support for Programming Languages and Operating System (ASPLOS'23)
  • Jan 2023: Paper evaluating the CIFER system-on-chip (in collaboration with our colleagues at Princeton University) accepted for publication in the IEEE Custom Integrated Circuits Conf. (CICC'23); CIFER is a 4x4mm 456M-transistor chip in GlobalFoundries 12nm which includes four RISC-V RV64GC Ariane cores (implemented using SystemVerilog), 18 RISC-V RV32IM tiny cores (implemented using PyMTL3), and an embedded FPGA (implemented using PRGA) interconnected through a heterogeneous cache coherent memory system.

2022

  • Dec 2022: Jack Brzozowski, Kyle Infantino, Dilan Lakhani, Angela Zou, and Lauren Shen completed their MEng design projects and graduated. Jack is heading to AMD; Kyle, Dilan, and Lauren are heading to Apple; and Angela is heading to Qualcomm – Congratulations!
  • Dec 2022: Research group celebrated with an end-of-semester dinner
  • Dec 2022: Co-advising the brand new Cornell Custom Silicon Systems (C2S2) project team. C2S2 is a student-led team of 25 diverse students including sophomores, juniors, and seniors organized into six subteams focusing on digital design and verification, analog design, software, system architecture, and project management. C2S2 is working hard towards their first tapeout on SkyWater 130nm this spring!
  • Dec 2022: Article on Jack Brozozowski, Kyle Infantino, and Dilan Lakhani's MEng design project which involved designing, testing, fabricating, and testing a custom RISC-V microcontroller in TSMC 180nm published as an ECE spotlight news item
  • Nov 2022: Lin Cheng successfully defended his doctoral thesis titled "Programming Frameworks for Improving the Productivity and Performance of Manycore Architectures". Lin is heading to Apple – Congratulations!
  • Nov 2022: Organized a hands-on activity for 20 freshmen to introduce them to computer engineering by building an Internet-of-things motion-dector plus alarm system as part of the educational outreach initiatives funded through a National Science Foundation (NSF) research grant
  • Oct 2022: Khalid Al-Hawaj successfully defended his doctoral thesis titled "Ephemeral Vector Engines". Khalid will be starting as an Assistant Professor at University – Congratulations!
  • Oct 2022: Paper on ephemeral vector engines accepted to the 29th IEEE Int'l Symp. on High-Peformance Computer Architecture (HPCA'23)
  • Oct 2022: Inducted into the ACM/IEEE Int'l Symp. on Microarchitecture (MICRO) Hall of Fame
  • Oct 2022: Austin Rovinski co-organized a tutorial on using open-source EDA tools in computer architecture research held in conjunction with the 55th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO'22) in Chicago, IL
  • Oct 2022: Tuan Ta presented our work on big.VLITTLE, a new technique for on-demand data-parallel acceleration in moble systems-on-chip at the 55th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO'22) in Chicago, IL
  • Sep 2022: Invited to present our vision for a new era of open-source hardware, using our work on PyMTL3 as a case study, at the Cornell Computer Science Colloquium
  • Sep 2022: Presented an overview of electrical and computer engineering to freshman advisees to explain why it is such an exciting time to study computer engineering
  • Aug 2022: Invited to attend the virtual Google Accelerators, Compute, Reliability, Security Workshop to discuss research problems facing Google in the areas of computer systems
  • Aug 2022: Course website for ECE 4750 Computer Architecture now online
  • Jul 2022: Co-taught (with Adrian Sampson) a week-long computer systems hardware module for Cornell's Rising Sophomore Summer Program in Computer Science (CSMore) partially funded through the broader impact plan of our NSF Panorama grant. Students learned about digital logic, computer arithmetic, and simple processors through a series of lectures, in-class activities, and labs. By end of the week, students had incrementally developed a "Femto-Processor" from just basic logic gates in Logisim. The Femto-Processor supported two instructions (i.e., write immediate and add) and was capable of executing up to 16-instruction programs to do simple arithmetic and generate the Fibonancci sequence.
  • Jul 2022: Paper on big.VLITTLE, a new technique for on-demand data-parallel acceleration in mobile systems-on-chip, accepted to the 55th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO'22)
  • Jul 2022: Organized a special session for the 59th ACM/IEEE Design Automation Conf. (DAC'22) on breaking down physical design barriers with open and agile flow tools; the session was chaired by Megan Wachs (SiFive) and included talks by Bora Nikolic (UC Berkeley) on Hammer, Christopher Torng (Stanford/USC) on mflowgen, and Andreas Olofsson (Zero ASIC) on silicon compiler with over 50 attendees
  • Jun 2022 Participated in the NYDesign/efabless IC design workshop in Rome, NY to discuss the emerging open-source hardware design ecosystem in upstate New York
  • Jun 2022: Taped out first teaching test chip for ECE 5745 Complex Digital ASIC Design on SkyWater 130nm through the efabless ChipIgnite program. The chip included four projects with 15 students participating: a CRC32 checksum unit implemented using C++ high-level synthesis via Mentor CatapultC, a latency insensitive synthesizable memory implemented in PyMTL3, a 2x2 systolic array multiplier implemented in SystemVerilog, and a greatest common divisor unit implemented in SystemVerilog. Each unit included its own dedicated SPI interface for isolated testing.
  • Jun 2022: Presented our work on using Guix in computer architecture research at both the gem5 users' workshop and the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) in New York City, NY as part of our open-source software/hardware advocacy broader impact initiative funded through our NSF Panorama grant
  • Jun 2022: Research group attended the 48th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA'22) in New York City, NY
  • Jun 2022: BRG alumnus Christopher Torng will be starting as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Southern California in January 2023
  • Jun 2022: Attended the final DARPA IDEA/POSH wrap-up meeting in San Diego, CA (with our collaborator Prof. David Wentzlaff at Princeton University) where we presented program outcomes on open-source cache coherent memory systems, open-source synthesizable FPGA generators, open-source on-chip network generators, open-source RTL testing frameworks, and a recent test chip in GlobalFoundries 14nm that served to silicon validate this open-source IP
  • May 2022: Our hint to enable more advanced JIT optimizations in PyPy, which was featured in our CGO'20 paper on type freezing, was merged upstream thanks to the hard work of Lin Cheng and our collaborator Carl Friedrich Bolz-Tereick
  • Jun 2022: Invited to help organize the in-person National Science Foundation (NSF) Workshop on Integrated Circuit Research, Education, and Workforce Development held in San Jose, CA
  • May 2022: Lakshmi Bolla completed her MEng design project and graduated. Lakshmi is heading to Qualcomm – Congratulations!
  • May 2022: Taped out BRGTC5, our fifth computer architecture test chip: a 2x2.5mm chip in TSMC 180nm designed and implemented using PyMTL3 by Jack Brozozowski, Kyle Infantino, and Dilan Lakhani (block diagram, die photo). The chip includes a RISC-V TinyRV2 five-stage pipelined microcontroller with a 16KB instruction memory, 16KB data memory, 4–8 digital I/Os and a SPI master interface to enable attaching peripherals, low-power sleep mode which wakes up on a digital input, and an SPI minion interface to enable a host computer to test the chip and load programs. The chip used a sophisticated PyMTL3-based pre- and post-silicon testing strategy.
  • May 2022: Paper making the case for using Guix to enable reproducible RISC-V software and hardware (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) to be held in conjunction with ISCA-48
  • May 2022: Paper making the case for using Guix to solve the gem5 packaging problem (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the gem5 users' workshop to be held in conjunction with ISCA-48
  • May 2022: Khalid Al-Hawaj, Tuan Ta, and Peitian Pan present posters on their work-in-progress as part of the ADA SRC JUMP center annual symposium
  • May 2022: Gave guest lecture in ENGRI 1210 The Computing Technology Inside Your Smartphone on Recent Trends in Computer Engineering
  • Mar 2022: Austin Rovinski from the University of Michigan joined the Batten Research Group as a Postdoctoral Associate – Welcome!
  • Feb 2022: Invited to serve as the program co-chair (with Jae Lee at the Seoul National University) for the IEEE Micro Top Picks 2023 selection committee (plenty of lead time to prepare!)
  • Jan 2022: Course website for ECE 5745 Complex Digital ASIC Design now online

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