All News

2022

  • Jun 2022: Presented our work on using Guix, in computer architecture research at both the gem5 users' workshop and the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) in New York City, NY as part of our open-source software/hardware advocacy broader impact initiative funded through our NSF Panorama grant
  • Jun 2022: Research group attended the 48th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA'22) in New York City, NY
  • Jun 2022: BRG alumnus Christopher Torng will be starting as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Southern California in January 2022
  • Jun 2022: Attended the final DARPA IDEA/POSH wrap-up meeting in San Diego, CA (with our collaborator Prof. David Wentzlaff at Princeton University) where we presented program outcomes on open-source cache coherent memory systems, open-source synthesizable FPGA generators, open-source on-chip network generators, open-source RTL testing frameworks, and a recent test chip in GF 14nm that served to silicon validate this open-source IP
  • May 2022: Our hint to enable more advanced JIT optimizations in PyPy, which was featured in our CGO'20 paper on type freezing, was merged upstream thanks to the hard work of Lin Cheng and our collaborator Carl Friedrich Bolz-Tereick
  • Jun 2022: Invited to help organize the in-person National Science Foundation (NSF) Workshop on Integrated Circuit Research, Education, and Workforce Development held in San Jose, CA
  • May 2022: Lakshmi Bolla completed her MEng design project and graduated. Lakshmi is heading to Qualcomm – Congratulations!
  • May 2022: Taped out BRGTC5, our fifth computer architecture test chip: a 2x2.5mm chip in TSMC 180nm designed and implemented using PyMTL3 by Jack Brozozowski, Kyle Infantino, and Dilan Lakhani (block diagram, chip plot). The chip includes a RISC-V TinyRV2 five-stage pipelined microcontroller with a 32KB instruction memory, 32KB data memory, 4–8 digital I/Os and a SPI master interface to enable attaching peripherals, low-power sleep mode which wakes up on a digital input, and an SPI minion interface to enable a host computer to test the chip and load programs. The chip used a sophisticated PyMTL3-based pre- and post-silicon testing strategy.
  • May 2022: Paper making the case for using Guix to enable reproducible RISC-V software and hardware (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) to be held in conjunction with ISCA-48
  • May 2022: Paper making the case for using Guix to solve the gem5 packaging problem (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the gem5 users' workshop to be held in conjunction with ISCA-48
  • May 2022: Khalid Al-Hawaj, Tuan Ta, and Peitian Pan present posters on their work-in-progress as part of the ADA SRC JUMP center annual symposium
  • May 2021: Gave guest lecture in ENGRI 1210 The Computing Technology Inside Your Smartphone on Recent Trends in Computer Engineering
  • Mar 2022: Austin Rovinski from the University of Michigan joined the Batten Research Group as a Postdoctoral Associate – Welcome!
  • Feb 2022: Invited to serve as the program co-chair (with Jae Lee at the Seoul National University) for the IEEE Micro Top Picks 2023 selection committee (plenty of lead time to prepare!)
  • Jan 2022: Course website for ECE 5745 Complex Digital ASIC Design now online

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