ECE 2400 / ENGRD 2140 Computer Systems Programming
This course aims to provide a strong foundation in the principles, practices, and art of computer systems programming using C and C++, the languages of choice for system-level programmers. The course lectures are structured into four parts. In the first part, students will use C to explore procedural programming (e.g., functions, conditional statements, and iteration statements; recursion; types; pointers; arrays; dynamic allocation). In the second part, students will apply their knowledge of C to explore basic data structures and algorithms (e.g., complexity analysis; sorting algorithms; lists, vectors, stacks, queues, priority queues, sets, and maps). In the third part, students will transition from C to C++ and then use C++ to explore four programming paradigms: object-oriented programming (e.g., C++ classes and inheritance for dynamic polymorphism), generic programming (e.g., C++ templates for static polymorphism), functional programming (e.g., C++ functors and lambdas), and concurrent programming (e.g., C++ threads and atomics). In the fourth part, students will apply their knowledge of multi-paradigm C++ to explore more algorithms and data structures involving trees (e.g., binary search trees, heaps), tables (e.g., lookup tables, hash tables), and graphs (e.g., depth-first search, breadth-first search, shortest path first, minimum spanning trees). The course includes hands-on discussion sections and a series of five programming assignments for students to put the principles they have learned into practice. Students will gain experience with UNIX software development including command line development tools, distributed version control, unit testing frameworks, continuous integration, debugging tools, and performance optimization. In the final two programming assignments, students will work in pairs to design, implement, test, and evaluate a high-performance handwriting recognition system to automatically classify handwritten letters.
ECE 4750 / CS 4420 Computer Architecture
This course aims to provide a strong foundation for students to understand the modern eras of computer architecture (i.e., the single-core era, multi-core era, and accelerator era) and to apply these insights and principles to future computer designs. The course is structured around the three primary building blocks of general-purpose computing systems: processors, memories, and networks. The first half of the course focuses on the fundamentals of each building block and will enable students to understand how these three building blocks can be integrated to build a simple multicore system. Topics include processor microcoding and pipelining; single-core and multi-core cache microarchitecture; and integrating processors, memories, and networks. The second half of the course delves into more advanced techniques and will enable students to understand how these three building blocks can be integrated to build a modern shared-memory multicore system. Topics include superscalar execution, out-of-order execution, register renaming, memory disambiguation, branch prediction, and speculative execution; multithreaded, VLIW, and SIMD processors; and memory synchronization, consistency, and coherence. Students will learn how to evaluate design decisions in the context of past, current, and future application requirements and technology constraints. This course includes a significant project decomposed into four lab assignments. Throughout the semester, students will gradually design, implement, test, and evaluate a complete multicore system capable of running simple parallel applications at the register-transfer level.
ECE 5745 Complex Digital ASIC Design
This course focuses on the principles and practices involved in the design, implementation, testing, and evaluation of complex standard-cell ASIC chips using automated state-of-the-art CAD tools. Topics include hardware description languages; CMOS logic, state, and interconnect fundamentals; chip design methodologies; automated cell-based design; CAD algorithms; details of accurately modeling ASIC delay, energy, and area; robustness issues; testing, verification, and debugging; power distribution and clocking; packaging and I/O. The course includes a six-week open-ended project where small groups of students design, implement, test, and evaluate an interesting technique in computer architecture using functional-, microarchitectural-, register-transfer-, and layout-level modeling.
ECE 5970 Special Topics: Chip-Level Interconnection Networks
Today's embedded, network, graphics, and server processors already contain tens to hundreds of cores integrated onto just a few chips, and this number will surely increase with future scaling. Chip-level interconnection networks, which connect cores on the same or different chips to each other and to main memory, are becoming a critical design component in terms of performance, power consumption, and programmer productivity. This course explores the underlying principles and the practical implementation issues for such networks. Topics include network topology, routing algorithms, flow-control strategies, router microarchitecture, performance analysis, and emerging physical technology issues. The course includes a mix of lectures and student-led discussion of both classic and modern research papers in the field. In the latter portion of the course, students work in small groups to design, implement, and evaluate an interesting research idea related to chip-level interconnection networks.