Christopher Batten

Publications by Year

2024

• Christopher Batten, Nathaniel Pinckney, Mingjie Liu, Haoxing Ren, and Brucek Khailany. "PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs." 6th ACM/IEEE Int'l Symp. on Machine Learning for CAD (MLCAD), Sep. 2024.
• Dai Cheol Jung, Max Ruttenberg, Paul Gao, Scott Davidson, Daniel Petrisko, Kangli Li, Aditya Kamath, Lin Cheng, Shaolin Xie, Peitian Pan, Zhongyuan Zhao, Zichao Yue, Bandhav Veluri, Sripathi Muralitharan, Adrian Sampson, Andrew Lumsdaine, Zhiru Zhang, Christopher Batten, Mark Oskin, Dustin Richmond, and Michael Taylor. "Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore." 51st ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), Jul. 2024. [link,pdf]
• Courtney Golden, Dan Ilan, Caroline Huang, Niansong Zhang, Zhiru Zhang, and Christopher Batten. "Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator." IEEE Computer Architecture Letters (CAL), 23(1):29–32, Jan-Jun. 2024. [link,pdf]
• Theses Supervised
  • Peitian Pan. "Addressing the Verification Challenge of Agile Hardware Methodologies." Ph.D. Thesis, Cornell University, May 2024. [pdf]

2023

• Courtney Golden, Dan Ilan, Caroline Huang, Niansong Zhang, Zhiru Zhang, and Christopher Batten. "Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator." 2nd Workshop on Democratizing Domain-Specific Accelerators (WDDSA), held in conjunction with MICRO-56, Oct. 2023. [link,slides]
• Max Doblas Font, Oscar Lostes-Cazorla, Quim Aguado-Puig, Nick Cebry, Pau Fontova, Christopher Batten, Santiago Marco-Sola, and Miquel Moreto. "GMX: Instruction Set Extensions for Fast, Scalable, and Efficient Genome Sequence Alignment." 56th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Oct. 2023. [link,pdf]
• Peitian Pan and Christopher Batten. "Formal Verification of the Stall Invariant Property for Latency-Insensitive RTL Modules." 21st ACM/IEEE Int'l Symp. on Formal Methods and Models for System Design (MEMOCODE), Sep. 2023. [link,pdf,slides]
• Peitian Pan, Shunning Jiang, Yanghui Ou, and Christopher Batten. "Symbolic Elaboration: Checking Generator Properties in Dynamic Hardware Description Languages." 21st ACM/IEEE Int'l Symp. on Formal Methods and Models for System Design (MEMOCODE), Sep. 2023. [link,pdf,slides]
• Ang Li, Ting-Jung Chang, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, and David Wentzlaff. "CIFER: A Cache-Coherent 12nm 16mm² SoC with Four 64-bit RISC-V Application Cores, 18 32-bit RISC-V Compute Cores, and a 1541 LUT6/mm² Synthesizable eFPGA." IEEE Solid-State Circuits Letters (SSCL), 6:229-232, Aug. 2023. [link,pdf]
• Courtney Golden, Dan Ilan, Nick Cebry, and Christopher Batten. "Accelerating Seed Location Filtering in DNA Read Mapping Using a Commercial Compute-in-SRAM Architecture." 5th Workshop on Accelerator Architecture in Computational Biology and Bioinformatics (AACBB) held in conjunction with ISCA-50, June 2023. [link,pdf,arXiv,slides]
• Peitian Pan, Yanghui Ou, Shunning Jiang, and Christopher Batten. "The Case for Gradually Typed Hardware Description Languages." Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE) held in conjunction with ASPLOS-28, Mar. 2023. [link,pdf,slides]
• Lin Cheng*, Max Ruttenberg*, Dai Cheol Jung, Dustin Richmond, Michael Taylor, Mark Oskin, and Christopher Batten. "Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Managed Scratchpad Memories." 28th ACM Int'l Conf. on Architectural Support for Programming Languages and Operating System (ASPLOS), Mar. 2023. (* = equally contributing co-first authors) [link,pdf]
• Ting-Jung Chang*, Ang Li*, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, and David Wentzlaff. "CIFER: A 12nm, 16mm², 22-Core SoC with a 1541 LUT6/mm², 1.92 MOPS/LUT, Fully Synthesizable, Cache- Coherent, Embedded FPGA." IEEE Custom Integrated Circuits Conference (CICC), Apr. 2023. (* = equally contributing co-first authors) [link,pdf]
• Khalid Al-Hawaj, Tuan Ta, Nicholas Cebry, Shady Agwa, Olalekan Afuye, Eric Hall, Courtney Golden, Alyssa Apsel, and Christopher Batten. "EVE: Ephemeral Vector Engines." 29th IEEE Int'l Symp. on High-Performance Computer Architecture (HPCA), Feb. 2023. [link,pdf,slides]
• Theses Supervised
  • Tuan Ta. "Evolutionary Hardware Specialization for Modern Vector and Matrix Architectures." Ph.D. Thesis, Cornell University, Aug. 2023.

2022

• Tuan Ta, Khalid Al-Hawaj, Nicholas Cebry, Yanghui Ou, Eric Hall, Courtney Golden, and Christopher Batten. "big.VLITTLE: On-Demand Data-Parallel Acceleration for Mobile Systems on Chip." 55th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Oct. 2022. [link,pdf,slides,artifact]
• Lin Cheng, Peitian Pan, Zhongyuan Zhao, Krithik Ranjan, Jack Weber, Bandhav Veluri, Borna Ehsani, Max Ruttenberg, Dai Cheol Jung, Preslav Ivanov, Dustin Richmond, Michael Taylor, Zhiru Zhang, and Christopher Batten. "A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems." IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD), 41(6):1620–1635, June 2022. [link,pdf]
• Christopher Batten, Pjotr Prins, Efraim Flashner, Arun Isaac, Jan Nieuwenhuizen, Ekaiz Zarraga, Tuan Ta, Austin Rovinski, Erik Garrison. "The Case for Using Guix to Enable Reproducible RISC-V Software & Hardware." 6th Workshop on Computer Architecture Research with RISC-V (CARRV) held in conjunction with ISCA-49, June 2022. [link,pdf,slides]
• Christopher Batten, Pjotr Prins, Efraim Flashner, Arun Isaac, Ekaiz Zarraga, Erik Garrison, Tuan Ta. "The Case for Using Guix to Solve the gem5 Packaging Problem." gem5 Users' Workshop held in conjunction with ISCA-49, June 2022. [link,pdf,slides]
• Theses Supervised
  • Lin Cheng. "Programming Frameworks for Improving the Productivity and Performance of Manycore Architectures." Ph.D. Thesis, Cornell University, Dec. 2022. [pdf]
  • Khalid Al-Hawaj. "Ephemeral Vector Engines." Ph.D. Thesis, Cornell University, Dec. 2022. [pdf]

2021

• Shunning Jiang, Yanghui Ou, Peitian Pan, and Christopher Batten. "UMOC: Unified Modular Ordering Constraints to Unify Cycle- and Register-Transfer-Level Modeling." 58th ACM/IEEE Design Automation Conf. (DAC), Dec. 2021. [link,pdf,slides]
• Olalekan Afuye, Shady Agwa, Christopher Batten, and Alyssa Apsel. "Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM." 47th IEEE European Solid-State Circuits Conf. (ESSCIRC) Sep. 2021. [link,pdf]
• Shunning Jiang*, Yanghui Ou*, Peitian Pan, Kaishuo Cheng, Yixiao Zhang, and Christopher Batten. "PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies." IEEE Design & Test, 38(2):53–61, Apr. 2021. (* = equally contributing co-first authors) [link,pdf]
• Christopher Torng, Peitian Pan, Yanghui Ou, Cheng Tan, and Christopher Batten. "Ultra-Elastic CGRAs for Irregular Loop Specialization." 27th IEEE Int’l Symp. on High-Performance Computer Architecture (HPCA), Feb. 2021. [link,pdf,slides,video,artifact]
• Helena Caminal, Kailin Yang, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Khalid Al-Hawaj, Tianshu Wu, Vijaykrishnan Narayanan, Christopher Batten, and José Martínez. "CAPE: A Content-Addressable Processing Engine." 27th IEEE Int’l Symp. on High-Performance Computer Architecture (HPCA), Feb. 2021. [link,pdf]
• Theses Supervised
  • Shunning Jiang. "Productive and Extensible Hardware Modeling, Simulation, and Verification Methodologies." Ph.D. Thesis, Cornell University, Aug. 2021. [pdf]
  • Moyang Wang. "Efficient Fine-Grain Cooperative Execution of Dynamic Task Parallelism on Heterogeneous Multi/Manycore Systems." Ph.D. Thesis, Cornell University, May 2021. [pdf]

2020

• Khalid Al-Hawaj, Olalekan Afuye, Shady Agwa, Alyssa Apsel, Christopher Batten. "Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator Using In-Situ Processing-In-SRAM." IEEE Int'l Symp. on Circuits and Systems (ISCAS), Oct 2020. [link,pdf,slides,video]
• Yanghui Ou, Shady Agwa, and Christopher Batten. "Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology." 14th ACM/IEEE Int'l Symp. on Networks-on-Chip (NOCS), Sep. 2020. (invited paper) [link,pdf,slides,video]
• Shunning Jiang, Peitian Pan, Yanghui Ou, and Christopher Batten. "PyMTL3: A Python Framework for Open-Source Hardware Modeling, Generation, Simulation, and Verification." IEEE Micro, 40(4):58–66, Jul/Aug. 2020. [link,pdf]
• Moyang Wang, Tuan Ta, Lin Cheng, and Christopher Batten. "Efficiently Supporting Dynamic Task Parallelism on Heterogeneous Cache-Coherent Systems." 47th ACM/IEEE Int’l Symp. on Computer Architecture (ISCA), June 2020. [link,pdf,slides,video,artifact]
• Lin Cheng, Berkin Ilbeyi, Carl Friedrich Bolz-Tereick, and Christopher Batten. "Type Freezing: Exploiting Attribute Type Monomorphism in Tracing JIT Compilers." 18th ACM/IEEE Int'l Symp. on Code Generation and Optimization (CGO), Feb. 2020. [link,pdf,slides,artifact]

2019

• Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, and Ronald G. Dreslinski. "Evaluating Celerity: A 16nm 695 Giga-RISC-V Instructions/s Manycore Processor with Synthesizable PLL." IEEE Solid-State Circuits Letters (SSCL), 2(12):289–292, Dec. 2019. [link,pdf]
• Cheng Tan, Yanghui Ou, Shunning Jiang, Peitian Pan, Christopher Torng, Shady Agwa, and Christopher Batten. "PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks." 37th IEEE Int'l Conf. on Computer Design (ICCD), Nov. 2019. [link,pdf,slides]
• Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, and Ron G. Dreslinski. "A 1.4 GHz 695 Giga RISC-V Inst/s 496-core Manycore Processor with Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS." IEEE Symp. on VLSI Circuits (VLSI), June 2019. [link,pdf]
• Theses Supervised
  • Christopher Torng. "Software, Architecture, and VLSI Co-Design for Fine-Grain Voltage and Frequency Scaling." Ph.D. Thesis, Cornell University, Dec. 2019. [pdf]
  • Berkin Ilbeyi. "Co-Optimizing Hardware Design and Meta-Tracing Just-in-Time Compilation." Ph.D. Thesis, Cornell University, May 2019. [pdf]

2018

• Shunning Jiang, Christopher Torng, and Christopher Batten. "An Open-Source Python-Based Hardware Generation, Simulation, and Verification Framework." First Workshop on Open-Source EDA Technology (WOSET) held in conjunction with ICCAD-37, Nov. 2018. [link,pdf,slides,poster]
• Tao Chen, Shreesha Srinath, Christopher Batten, and Edward Suh. "An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware." 51st ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Oct. 2018. [link,pdf,slides,video]
• Christopher Torng, Shunning Jiang, Khalid Al-Hawaj, Ivan Bukreyev, Berkin Ilbeyi, Tuan Ta, Lin Cheng, Julian Puscar, Ian Galton, and Christopher Batten. "A New Era of Silicon Prototyping in Computer Architecture Research." RISC-V Day Workshop held in conjunction with MICRO-51, Oct. 2018. [link,pdf,slides]
• Tuan Ta, Lin Cheng, and Christopher Batten. "Simulating Multi-Core RISC-V Systems in gem5." 2nd Workshop on Computer Architecture Research with RISC-V (CARRV) held in conjunction with ISCA-45, June 2018. [link,pdf,slides]
• Shunning Jiang, Berkin Ilbeyi, and Christopher Batten. "Mamba: Closing the Performance Gap in Productive Hardware Development Frameworks." 55th ACM/IEEE Design Automation Conf. (DAC), June 2018. [link,pdf,slides,code]
• Ivan Bukreyev, Christopher Torng, Waclaw Godycki, Christopher Batten, and Alyssa Apsel. "Four Monolithically Integrated Switched-Capacitor DC-DC Converters with Dynamic Capacitance Sharing in 65-nm CMOS." IEEE Transactions on Circuits and Systems I (TCAS-I), 65(6):2035–2047, June 2018. [link,pdf]
• Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, and Michael B. Taylor. "The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips." IEEE Micro, 38(2):30–41, Mar/Apr. 2018. (special issue for top picks from HOTCHIPS-29) [link,pdf]
• Theses Supervised
  • Shreesha Srinath. "Lane-Based Hardware Specialization for Loop- and Fork-Join-Centric Parallelization and Scheduling Strategies." Ph.D. Thesis, Cornell University, Aug. 2018. [pdf]

2017

• Tutu Ajayi, Khalid Al-Hawaj, Aporva Amarnath, Steve Dai, Scott Davidson, Paul Gao, Gai Liu, Anuj Rao, Austin Rovinski, Ningxiao Sun, Christopher Torng, Luis Vega, Bandhav Veluri, Shaolin Xie, Chun Zhao, Ritchie Zhao, Christopher Batten, Ronald G. Dreslinski, Rajesh K. Gupta, Michael B. Taylor, and Zhiru Zhang. "Experiences Using the RISC-V Ecosystem to Design an Accelerator-Centric SoC in TSMC 16nm." First Workshop on Computer Architecture Research with RISC-V (CARRV) held in conjunction with MICRO-50, Oct. 2017. [link,pdf,slides]
• Ji Kim, Shunning Jiang, Christopher Torng, Moyang Wang, Shreesha Srinath, Berkin Ilbeyi, Khalid Al-Hawaj, and Christopher Batten. "Using Intra-Core Loop-Task Accelerators to Improve the Productivity and Performance of Task-Based Parallel Programs." 50th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Oct. 2017. [link,pdf,slides,poster,video]
• Berkin Ilbeyi, Carl Friedrich Bolz-Tereick, and Christopher Batten. "Cross-Layer Workload Characterization of Meta-Tracing JIT VMs." IEEE Int'l Symp. on Workload Characterization (IISWC), Oct. 2017. [link,pdf,slides]
• Tutu Ajayi, Khalid Al-Hawaj, Aporva Amarnath, Steve Dai, Scott Davidson, Paul Gao, Gai Liu, Atieh Lotfi, Julian Puscar, Anuj Rao, Austin Rovinski, Loai Salem, Ningxiao Sun, Christopher Torng, Luis Vega, Bandhav Veluri, Xiaoyang Wang, Shaolin Xie, Chun Zhao, Ritchie Zhao, Christopher Batten, Ronald G. Dreslinski, Ian Galton, Rajesh K. Gupta, Patrick P. Mercier, Mani Srivastava, Michael B. Taylor, and Zhiru Zhang. "Celerity: An Open-Source RISC-V Tiered Accelerator Fabric." 29th ACM/IEEE Symp. on High-Performance Chips (HOTCHIPS), Aug. 2017. [link,slides]
• Haihang (Steve) Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, and Zhiru Zhang. "Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis." 25th ACM Int'l Symp. on Field Symposium on Field-Programmable Gate Arrays (FPGA), Feb. 2017. [link,pdf]
• Theses Supervised
  • Ji Kim. "Software/Hardware Co-Design to Improve Productivity, Portability, and Performance of Loop-Task Parallel Applications." Ph.D. Thesis, Cornell University, Feb. 2017. (Cornell ECE Outstanding Ph.D. Thesis Award) [pdf]

2016

• Christopher Torng, Moyang Wang, Bharath Sudheendra, Nagaraj Murali, Suren Jayasuriya, Shreesha Srinath, Taylor Pritchard, Robin Ying, and Christopher Batten. "Experiences Using a Novel Python-Based Hardware Modeling Framework for Computer Architecture Test Chips." 28th ACM/IEEE Symp. on High-Performance Chips (HOTCHIPS) Student Poster Session, Aug. 2016. [link,pdf,slides,poster]
• Christopher Torng, Moyang Wang, and Christopher Batten. "Asymmetry-Aware Work-Stealing Runtimes." 43rd ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), June 2016. [link,pdf,slides,scripts,errata]
• Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, and Zhiru Zhang. "Improving High-Level Synthesis with Decoupled Data Structure Optimization." 53rd ACM/IEEE Design Automation Conf. (DAC-53), June 2016. [link,pdf]
• Berkin Ilbeyi and Christopher Batten. "JIT-Assisted Fast-Forward Embedding and Instrumentation to Enable Fast, Accurate, and Agile Simulation." IEEE Int'l Symp. on Performance Analysis of Systems and Software (ISPASS), Apr. 2016. [link,pdf,slides]
• Berkin Ilbeyi, Derek Lockhart, and Christopher Batten. "Pydgin for RISC-V: A Fast and Productive Instruction-Set Simulator." 3rd RISC-V Workshop, Jan. 2016. [link,pdf,slides,video]

2015

• Derek Lockhart, Berkin Ilbeyi, and Christopher Batten. "Pydgin: Generating Fast Instruction Set Simulators from Simple Architecture Descriptions with Meta-Tracing JIT Compilers." IEEE Int'l Symp. on Performance Analysis of Systems and Software (ISPASS), Mar. 2015. [link,pdf,slides,code]
• Theses Supervised
  • Derek Lockhart. "Constructing Vertically Integrated Hardware Design Methodologies using Embedded Domain-Specific Languages and Just-in-Time Optimization." Ph.D. Thesis, Cornell University, Jul. 2015. [pdf]

2014

• Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, and Christopher Batten. "Architectural Specialization for Inter-Iteration Loop Dependence Patterns." 47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Dec. 2014. [link,pdf,slides,poster]
• Ji Kim and Christopher Batten. "Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists." 47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Dec. 2014. [link,pdf,slides,poster]
• Waclaw Godycki*, Christopher Torng*, Ivan Bukreyev, Alyssa Apsel, and Christopher Batten. "Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks." 47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Dec. 2014. (* = equally contributing co-first authors) [link,pdf,slides,poster]
• Derek Lockhart, Gary Zibrat, and Christopher Batten. "PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research." 47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Dec. 2014. [link,pdf,slides,poster,code]
• Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, and Christopher Batten. "XLOOPS: Explicit Loop Specialization." Workshop on Heterogeneous Computing Platforms (HCP) held in conjunction with ICCAD-33, Nov. 2014. (extended abstract for poster) [pdf]
• Derek Lockhart and Christopher Batten. "Hardware Generation Languages as a Foundation for Credible, Reproducible, and Productive Research Methodologies." Workshop on Reproducible Research Methodologies (REPRODUCE) held in conjunction with HPCA-20, Feb. 2014. (extended abstract) [pdf]

2013

• Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, and Krste Asanović. "Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators." ACM Transactions on Computer Systems (TOCS), 31(3):6, Aug. 2013. [link,pdf]
• Ji Kim, Christopher Torng, Shreesha Srinath, Derek Lockhart, and Christopher Batten. "Microarchitectural Mechanisms to Exploit Value Structure in SIMT Architectures." 40th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), June 2013. [link,pdf,slides]
• Christopher Batten, Ajay Joshi, Vladimir Stojanović, and Krste Asanović. "Designing Chip-Level Nanophotonic Interconnection Networks." In Gabriela Nicolescu and Ian O'Connor (Eds.), Integrated Optical Interconnect Architectures and Applications in Embedded Systems. Springer, 2013. (extended version of JETCAS'12 paper) [link]

2012

• Christopher Batten, Ajay Joshi, Vladimir Stojanović, and Krste Asanović. "Designing Chip-Level Nanophotonic Interconnection Networks." IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2(2):137-153, June 2012. [link,pdf]

2011

• Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, and Krste Asanović. "Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators." 38th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), June 2011. [link,pdf]
• Nithin Michael, Milen Nikolov, Ao Tang, Edward Suh, and Christopher Batten. "Analysis of Application-Aware On-Chip Routing under Traffic Uncertainty." 5th ACM/IEEE Int'l Symp. on Networks-on-Chip (NOCS), May 2011. [link,pdf]

2010

• Mark Cianchetti, Nicholás Sherwood-Droz, and Christopher Batten. "Implementing System-in-Package with Nanophotonic Interconnect." Workshop on the Interaction between Nanophotonic Devices and Systems (WINDS) held in conjunction with MICRO-43, Dec. 2010. (extended abstract) [link,pdf]
• Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanović, and Krste Asanović. "Re-Architecting DRAM Memory Systems with Monolithically Integrated Silicon Photonics." 37th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), June 2010. [link,pdf]
• Douglas Densmore, Timothy Hsiau, Joshua Kittleson, Will DeLoache, Christopher Batten, and J. Christopher Anderson. "Algorithms for Automated DNA Assembly." Nucleic Acids Research (NAR), 38(8):2624–2636, May 2010. [link,pdf]
• Vladimir Stojanović, Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Chen Sun, Krste Asanović. "A Design-Space Exploration for CMOS Photonic Processor Networks.", Optical Fiber Communication Conf. and The National Fiber Optic Engineers Conf. (OFC/NFOEC), Mar. 2010. (extended abstract for invited talk) [link,pdf]
• Christopher Batten. "Simplified Vector-Thread Architectures for Flexible and Efficient Data-Parallel Accelerators." Ph.D. Thesis, Massachusetts Institute of Technology, Feb. 2010. [link,pdf]

2009

• Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanović, and Vladimir Stojanović. "Limits and Opportunities for Designing Manycore Processor-to-Memory Networks using Monolithic Silicon Photonics." Workshop on Photonic Interconnects and Computer Architecture (PICA) held in conjunction with MICRO-42, Dec. 2009. (extended abstract) [pdf]
• Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles W. Holzwarth, Miloš A. Popović, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanović, and Krste Asanović. "Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics." IEEE Micro, 29(4):8–21, July/Aug. 2009. (special issue for top picks from HOTI-16) [link,pdf]
• Vladimir Stojanović, Ajay Joshi, Christopher Batten, Yong-Jin Kwon, and Krste Asanović, "Manycore Processor Networks with Monolithic Integrated CMOS Photonics.", 29th Conf. on Lasers and Electro-Optics (CLEO), June 2009. (extended abstract for invited talk) [link,pdf]
• Scott Beamer, Krste Asanović, Christopher Batten, Ajay Joshi, and Vladimir Stojanović. "Designing Multi-Socket Systems Using Silicon Photonics." 23rd ACM Int'l Conf. on Supercomputing (ICS), June 2009. (extended abstract for poster) [link,pdf]
• Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanović, and Vladimir Stojanović. "Silicon-Photonic Clos Networks for Global On-Chip Communication." 3rd ACM/IEEE Int'l Symp. on Networks-on-Chip (NOCS), May 2009. (nominated for best paper award) [link,pdf]

2008

• Christopher Batten, Hidetaka Aoki, and Krste Asanović. "The Case for Malleable Stream Architectures." Workshop on Streaming Systems (WSS) held in conjunction with MICRO-41, Nov. 2008. (extended abstract) [link,pdf,slides]
• Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles W. Holzwarth, Miloš A. Popović, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanović, and Krste Asanović. "Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics." 16th IEEE Symp. on High-Performance Interconnects (HOTI), Aug. 2008. (selected as an IEEE Micro top pick from HOTI-16) [link,pdf,slides]
• Ronny Krashinsky, Christopher Batten, and Krste Asanović. "Implementing the Scale Vector-Thread Processor." ACM Transactions on Design Automation of Electronic Systems (TODAES), 13(3):41, July 2008. (selected as an ISSCC/DAC student design contest winner) [link,pdf]

2007

• Christopher Batten, Ronny Krashinsky, and Krste Asanović. "Scale Control Processor Test-Chip." MIT Computer Science and Artificial Intelligence Technical Report, No. 2007-003, Jan. 2007. [link,pdf]

2005

• Jared Casper, Ronny Krashinsky, Christopher Batten, and Krste Asanović. "A Parameterizable FPGA Prototype of a Vector-Thread Processor." Workshop on the Architecture Research using FPGA Platforms (WARFP) held in conjunction with HPCA-11, Feb. 2005. (extended abstract) [link,pdf]

2004

• Christopher Batten, Ronny Krashinsky, Steve Gerding, and Krste Asanović. "Cache Refill/Access Decoupling for Vector Machines." 37th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO), Dec. 2004. [link,pdf,slides]
• Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, and Krste Asanović. "The Vector-Thread Architecture." IEEE Micro, 24(6):84–90, Nov./Dec. 2004. (special issue for top picks from 2004 computer architecture conferences) [link,pdf]
• Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, and Krste Asanović. "The Vector-Thread Architecture." 31st ACM/IEEE Int'l Symp. on Computer Architecture (ISCA), June 2004. (selected as an IEEE Micro top pick from 2004 computer architecture conferences) [link,pdf]
• Christopher Batten, Ronny Krashinsky, and Thomas Knight, Jr. "A Scalable Cellular Logic Technology Using Zinc-Finger Proteins." 3rd Workshop on Non-Silicon Computing (NSC) held in conjunction with ISCA-31, June 2004. [pdf,slides]

prior to 2004

• Christopher Batten, David Holburn, Bernie Breton, and Nicholas Caldwell. "Sharpness Search Algorithms for Automatic Focusing in the Scanning Electron Microscope." SCANNING: The Journal of Scanning Microscopies, 23(2):112–113, Mar./Apr. 2001. (extended abstract for SCANNING'01 conference, won best student presentation award) [link,pdf,slides]
• Christopher Batten, Kenneth Barr, Arvind Saraf, and Stanley Trepetin. "pStore: A Secure Peer-to-Peer Backup System." MIT Laboratory for Computer Science Technical Memo, No. 632, Oct. 2002. [link,pdf]
• Christopher Batten. "Autofocusing and Astigmatism Correction in the Scanning Electron Microscope." M.Phil. Thesis, University of Cambridge, Aug. 2000. [pdf]
• Christopher Batten. "A Hardware Implementation for Component Failure Handling in Isotach Token Managers." Undergraduate Thesis, University of Virginia, May 1999. (won first place in undergraduate research and design symposium) [pdf]