Postdoctoral Researcher Opportunity
Project: Continuous Reconfiguration of Polymorphic Hardware
Location: Cornell University, Ithaca, NY
Advisers: Christopher Batten
Duration: 1-2 years starting January 2022 (earlier start date possible)
The Computer Systems Laboratory at Cornell seeks a postdoctoral researcher to contribute to an ongoing project designing a new kind of continuously reconfigurable machine. The project spans computer architecture, digital VLSI, and electronic design automation research.
The postdoc will work within the research group of Professor Christopher Batten in the department of Electrical and Computer Engineering at Cornell University. Prof. Batten received his Ph.D. at MIT and was a co-architect of the Scale VT Processor and published some of the first papers on chip-level silicon-photonic interconnection networks. More recently, the Batten Research Group at Cornell has done pioneering work in the areas of programmable data- and task-parallel accelerators, compute-in-memory architectures, network-on-chip design, and highly productive hardware design methodologies. In the past five years, Prof. Batten's group has published numerous papers in top-tier architecture/VLSI/EDA venues (e.g., ISCA'16/'20, MICRO'17/'18, HPCA'21, HOTCHIPS'17, IEEE MICRO'18, IEEE D&T'21, DAC'16/'18/'21, ISCAS'20, NOCS'20, TCAD'18) and has been involved in numerous tapeouts on IBM 130nm, TSMC 16nm/28m/65m/180nm, GF 14nm, and Intel 22FFL. The postdoc will be an integral part of the Batten Research Group and have opportunities to mentor PhD, masters, and undergraduate researchers. The project also includes other researcher groups led by Prof. Adrian Sampson (Cornell University), Prof. Zhiru Zhang (Cornell University), and Prof. Michael Taylor (University of Washington).
While one-off ASICs offer leaps in computational efficiency even in face of slowed returns from Moore's law, they sacrifice flexibility and programmability. We are designing a new kind of reconfigurable architecture based on integrating a massively parallel manycore processor with a coarse-grain reconfigurable array fabric. The system is designed for high-frequency reconfiguration based on shifting application demands. The project aims to approach ASIC-like efficiency by continuously optimizing the system's organization to specialize the compute datapath and exploit HBM's high bandwidth and low latency.
We are seeking recent PhDs in CS or ECE with expertise in architecture, digital VLSI, and/or EDA. Researchers with expertise in architecture will be expected to have experience in designing real microarchitectures (e.g., processor design, cache pipeline design) and then modeling these designs using cycle-level simulation frameworks (e.g., gem5). Researchers with expertise in VLSI will be expected to have experience in RTL modeling (e.g., Verilog), ASIC design tools (e.g., logic synthesis, physical design), and tapeouts. Researchers with expertise in EDA will be expected to have experience building real tools and/or methodologies that significantly improve the process of designing and testing FPGA and/or ASIC hardware. Ideal candidates will have expertise spanning at least two of these three areas. Ideal candidates will be "builders" and have a track record of releasing or deploying real systems.
The position starts January 2022 (although an earlier start date is also possible) and lasts for one or two years, depending on the candidate’s preference. The postdoc will work with the PIs and students to refine the project's current research direction, contribute to building the system, release open-source hardware and software, and write papers for top-tier architecture, digital VLSI, and/or EDA conferences. This is a leadership role; there will be opportunities to mentor students and to give talks at companies and other universities.
We take diversity and inclusion seriously. Cornell is a recognized employer and educator valuing AA/EEO, Protected Veterans, and Individuals with Disabilities.
How to Apply
Send the following materials to firstname.lastname@example.org in PDF format: (1) a cover letter summarizing your relevant research experience, why you are good fit for the position, and how the position relates to your career goals; (2) your CV including a list of all publications; (3) a list of 2-3 references including your PhD research adviser; (4) your undergraduate and graduate transcripts.