2020

  • [C69] Y. Hu, Z. Ye, M. Wang, J. Yu, D. Zheng, M. Li, Z. Zhang, Z. Zhang, and Y. Wang, FeatGraph: A Flexible and Efficient Backend for Graph Neural Network Systems, to appear in International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), Nov. 2020.
  • [C68] Y.-H. Lai, H. Rong, S. Zheng, W. Zhang, X. Cui, Y. Jia, J. Wang, B. Sullivan, Z. Zhang, Y. Liang, Y. Zhang, J. Cong, N. George, J. Alvarez, C. Hughes and P. Dubey, SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs, to appear in International Conference On Computer Aided Design (ICCAD), Nov. 2020.
  • [C67] E. Ustun, C. Deng, D. Pal, and Z. Zhang, Accurate Operation Delay Prediction for FPGA HLS using Graph Neural Networks, to appear in International Conference On Computer Aided Design (ICCAD), Nov. 2020.
  • [C66] N. Srivastava, H. Jin, J. Liu, D. Albonesi, and Z. Zhang, MatRaptor: A Sparse-Sparse Matrix Multiplication Accelerator Based on Row-Wise Product, to appear in International Symposium on Microarchitecture (MICRO), Oct. 2020.
  • [C65] L. Guo, J. Lau, Y. Chi, J. Wang, C. Yu, Z. Chen, Z. Zhang, and J. Cong, Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency, Design Automation Conference (DAC), Jul. 2020.
  • [C64] E. Singh, F. Lonsing, S. Chattopadhyay, M. Strange, P. Wei, X. Zhang, Y. Zhou, J. Cong, D. Chen, Z. Zhang, P. Raina, C. Barrett, and S. Mitra, A-QED Verification of Hardware Accelerators, Design Automation Conference (DAC), Jul. 2020.
  • [C63] R. Nigam, S. Atapattu, S. Thomas, Z. Li, T. Bauer, Y. Ye, A. Koti, A. Sampson, and Z. Zhang, Predictable Design of FPGA Accelerators using Time-Sensitive Affine Types, ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Jun. 2020.
  • [C62] C. Deng, Z. Zhao, Y. Wang, Z. Zhang, and Z. Feng, GraphZoom: A Multi-Level Spectral Approach for Accurate and Scalable Graph Embedding, International Conference on Learning Representations (ICLR), Apr. 2020. (Oral)
  • [C61] Y. Zhang, R. Zhao, W. Hua, N. Xu, G. E. Suh, and Z. Zhang, Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations, International Conference on Learning Representations (ICLR), Apr. 2020.
  • [C60] N. Srivastava, H. Jin, S. Smith, H. Rong, D. Albonesi, and Z. Zhang, Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations, International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2020.

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