2020

  • [C60] N. Srivastava, H. Jin, S. Smith, H. Rong, D. Albonesi, and Z. Zhang, Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations, to appear in International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2020.
  • [J10] A. Rovinski, C. Zhao, K. Al-Hawaj, P. Gao, S. Xie, C. Torng, S. Davidson, A. Amarnath, L. Vega, B. Veluri, A. Rao, T. Ajayi, J. Puscar, S. Dai, R. Zhao, D. Richmond, Z. Zhang, I. Galton, C. Batten, M. Taylor, and R. Dreslinski, Evaluating Celerity: A 16nm 695 Giga-RISC-V Instructions/s Manycore Processor with Synthesizable PLL, to appear in IEEE Solid-State Circuits Letters (SSC-L), 2020.

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