Heterogeneous computer architectures with extensive use of hardware accelerators, such as FPGAs, GPUs, and neural processing units, have shown significant potential to bring in orders of magnitude improvement in compute efficiency for a broad range of applications. However, system designers exploring these non-traditional architectures generally lack effective design methodologies and tools to swiftly navigate through the intricate design trade-offs and achieve rapid design closure. While several heterogeneous computing platforms are becoming commercially available to a wide user base, they are very difficult to program, especially those with reconfigurable logics. To address these pressing challenges, my research group investigate new applications, programming models, and computer-aided design (CAD) algorithms and tools to enable productive design and implementation of highly efficient application- and domain-specific computer systems. Our cross-cutting research intersects CAD, compilers, and computer architecture at multiple scales, from circuit-level building blocks, to chip-level processor and co-processor cores, as well as system-level heterogeneous compute nodes. In particular, we are currently tackling the following important and challenging problems:


Research conducted by my group is currently sponsored by Defense Advanced Research Projects Agency (DARPA), National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Intel Corporation, and Xilinx, Inc. Their support is greatly appreciated.