Cornell University
School of Electrical and Computer Engineering
ECE 4750 / CS 4420 / ECE 5740
Computer Architecture
Fall 2026
Prof. José F. Martínez
Lectures: Mon/Wed @ 2:55–4:10 p.m. • Gates G01
Section: Fri @2:30–3:20 p.m. • Phillips 101
home | syllabus | schedule | handouts
Lecture Handouts
- Lecture 1: Course Overview
- T01: Processor Concepts (notes) (problems)
- T02: Processor Microarchitecture (notes) (problems)
Lab Handouts
- Lab Assignment Logistics
- Lab Report Template
- Lab 1: Iterative Integer Multiplier
- Lab 2: Pipelined Processor
Section Handouts
- Section 1: RTL Design with Verilog (github)
- Section 2: RTL Testing (github)
- Section 3: Bug Hunt! (github)
Other Helpful Handouts
- Tiny RISC-V Instruction Set Specification
- Verilog RTL Usage Rules
- Cross-compile a simple C program for RISC-V
Tutorial Handouts
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For those of you new to Cornell ECE, please look over Tutorial 0 to learn how to access the eductional ECE servers used in this course. We assume that everyone is familiar with using the command line and git. If this is not the case, please complete Tutorials 1 and 2 below to bring yourself up to speed.
- Tutorial 0: ECE Linux Server Remote Access
- Tutorial 1: Linux Command Line Basics
- Tutorial 2: Using Git
- Tutorial 3: Verilog Hardware Description Language (github)