ECE 5740 Readings

  1. Asanovic and Patterson: Instruction Sets Should Be Free: The Case for RISC-V, 2014 (2 pages) [ pdf ]
  2. William A. Wulf: Compilers and Computer Architecture, 1981 (7 pages) [ pdf ]
  3. Colwell, Hitchcock, Jensen, Brinkley Sprunt, and Kollar: Instruction Sets and Beyond: Computers, Complexity, and Controversy, IEEE, 1985 (11 pages) [ pdf ]
  4. S. Belayneh and D. Kaeli: A Discussion on Non-Blocking/Lockup-Free Caches, ACM SIGARCH Computer Architecture News, 24(3):18–25, Jun. 1996. (8 pages) [pdf]
  5. Kenneth C. Yeager: The MIPS R10000 Superscalar Microprocessor, IEEE MICRO, Jun. 1996. (13 pages, but only ~10 required) [pdf, pdf marked to show out-of-scope paragraphs available on canvas]
    (short quiz not yet available)

Reading Materials

There are a variety of ways students can gain access to the required reading materials including: purchasing the books; using the hard copies in Uris Library; using the free online e-book available to Cornell students for Hennessy & Patterson, Harris & Harris, and Dally & Towles; and/or downloading materials from Canvas.

Reading Assignments

Students are expected to complete all of the assigned reading according to the schedule below, although there is some flexibility. Some students may prefer to complete the readings before the corresponding lecture, while others may prefer to complete the readings after the corresponding lecture. Either strategy is acceptable.

Readings are marked with the following symbols:

Course Overview

Topic 1: Fundamental Processor Concepts

Topic 2: Fundamental Processor Microarchitecture

Topic 3: Fundamental Memory Concepts

Topic 4: Fundamental Memory Microarchitecture

Topic 5: Integrating Processors and Cache Memories

Topic 6: Advanced Processors -- Superscalar Execution

Topic 7: Advanced Procesors -- Out-of-Order Execution

Topic 8: Advanced Procesors -- Register Renaming

Topic 9: Advanced Procesors -- Memory Disambiguation

Topic 10: Advanced Procesors -- Branch Prediction

Topic 11: Advanced Procesors -- Speculative Execution

Extra Topic 1: VLIW Processors

Extra Topic 2: SIMD Processors

Extra Topic 3: Multithreaded Processors

Optional Reading for Architecture Case-Studies