An introductory course in computer engineering that teaches the fundamental concepts of digital logic design and computer organization. Lecture topics include binary numbers, Boolean algebra, logic gates and combinational logic, sequential logic, state machines, memories, instruction set architecture, processor organization, caches and virtual memory, input/output, and case studies. Design methodology using both discrete components and hardware description languages is covered in the weekly laboratory portion of the course.
| Date |
Lecture |
Reading |
Lab |
HW/Exam |
| Tue 1/25 |
1: Course Overview [slides] [syllabus] |
1.1-1.4.2, 1.5-1.6.2, 2.1-2.3 |
|
| Thu 1/27 |
2: Boolean Algebra [slides] |
2.4-2.7 |
|
HW 1 out |
| Tue 2/1 |
3: Combinational Logic Minimization [slides] |
1.7 |
Lab 1 out |
|
| Thu 2/3 |
4: CMOS Logic [slides] |
2.8 |
|
HW 2 out |
| Fri 2/4 |
|
Due: HW 1 |
| Tue 2/8 |
5: Combinational Building Blocks [slides] |
3.1-3.2 |
Lab 2 out |
|
| Wed 2/9 |
|
Due: Lab 1 |
|
| Thu 2/10 |
6: Sequential Logic: Clocks, Latches, FFs [slides] |
4.1-4.5 (skip VHDL), 5.4 |
|
HW 3 out |
| Fri 2/11 |
|
Due: HW 2 |
| Tue 2/15 |
7: More Sequential Logic, Verilog [slides] |
3.4, 4.6 |
|
| Wed 2/16 |
|
Due: Prelab 2a |
|
| Thu 2/17 |
8: Finite State Machines (FSMs) 1 [slides] |
4.9 |
|
| Fri 2/18 |
|
Due: HW 3 |
| Tue 2/22 |
9: FSMs 2, FSMs in Verilog [slides] |
2.9, 4.6, 4.9 |
|
| Thu 2/24 |
In-class Prelim 1 @ 1:00pm |
|
| 2/26 – 3/1 |
— February Break — |
| Wed 3/2 |
|
HW 4 out |
| Thu 3/3 |
10: FSMs 3, Timing [slides] |
1.4 |
|
| Fri 3/4 |
|
Due: Lab 2a |
|
| Tue 3/8 |
Quartus/Verilog Tutorial |
|
|
| Wed 3/9 |
|
Due: Prelab 2b |
|
| Thu 3/10 |
11: Timing Analysis [slides] [notes] |
3.4-3.5.5 |
Lab 3 out |
|
| Fri 3/11 |
|
|
Due: HW 4 |
| Mon 3/14 |
|
Due: Lab 2b |
|
| Tue 3/15 |
12: Binary Arithmetic 1 [slides] |
5.1-5.2.3, 5.5 |
|
| Wed 3/16 |
|
Due: Prelab 3a |
|
| Thu 3/17 |
13: Binary Arithmetic 2, ALU [slides] |
7.1-7.3.1 |
|
HW 5 out |
| Tue 3/22 |
14: ROM, DRAM, and SRAM [slides] |
7.3.2-7.3.4 |
|
| Wed 3/23 |
|
Due: Lab 3a |
|
| Thu 3/24 |
15: Single Cycle Microprocessor 1 [slides] |
|
HW 6 out |
| Fri 3/25 |
|
Due: HW 5 |
| Mon 3/28 |
|
Due: Prelab 3b |
|
| Tue 3/29 |
16: Single Cycle Microprocessor 2 [slides] |
7.5.1-7.5.2 |
|
| Wed 3/30 |
|
Due: Lab 3b |
|
| Thu 3/31 |
17: Pipelined Microprocessor 1 [slides] |
7.5.3-7.5.5 |
Lab 4 out |
|
| Fri 4/1 |
|
Due: HW 6 |
| 4/2 – 4/10 |
— Spring Break — |
| Tue 4/12 |
18: Pipelined Microprocessor 2 [slides] |
|
Prelim 2 @ 7:30 pm, Kimball B11 |
| Thu 4/14 |
19: Pipelined Microprocessor 3 [slides] |
8-8.3 |
|
| Fri 4/15 |
|
Due: Lab 3 report |
|
| Mon 4/18 |
|
Due: Prelab 4a |
|
| Thu 4/19 |
20: Caches and Main Memory 1 [slides] |
|
|
| Wed 4/20 |
|
Due: Lab 4a |
|
| Thu 4/21 |
21: Caches 2 [slides] |
7.5.5, 8.2 |
|
HW 7 out |
| Tue 4/26 |
22: Caches 3 [slides] |
8.4 |
|
| Wed 4/27 |
|
Due: Lab 4b |
|
| Thu 4/28 |
23: Measuring Performance [slides] |
8.4 |
|
HW 8 out |
| Fri 4/29 |
|
Lab 5 out |
Due: HW 7 |
| Mon 5/2 |
|
Due: Lab 4c |
|
| Tue 5/3 |
24: Virtual Memory [slides] |
6.7.2, 7.7 |
|
| Wed 5/4 |
|
Due: Lab 4 report (1w extension) |
|
| Thu 5/5 |
25: Exceptions, Input/Output [slides] |
|
| Fri 5/6 |
|
Due: HW 8 |
| Mon 5/9 |
|
Due: Lab 5 |
|
| Tue 5/10 |
26: Advanced Topics [slides] |
|
Thu 5/19 |
|
Final exam @ 7:00pm, Olin 255 |
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