
Christopher Batten
Associate Professor
Computer Systems Laboratory
School of Electrical and Computer Engineering
College of Engineering
Cornell University
office: 323 Rhodes Hall, Ithaca, NY 14853
phone: (607) 255-2672
email: cbatten cornell edu
I am an Associate Professor of Electrical and Computer Engineering and a graduate field member of Computer Science at Cornell University. My research group is part of the Computer Systems Laboratory, and we largely work at the intersection of computer architecture, electronic design automation, and digital VLSI including projects on parallel programming frameworks, programmable accelerator design, interconnection networks, productive VLSI chip design methodologies, and architectures for future emerging technologies. Building prototype systems is an integral part of my research, as this is one of the best ways to validate assumptions, gain intuition about physical design issues, and provide platforms for future software research.
My research has been recognized with several awards including a Cornell Engineering Research Excellence Award, an AFOSR Young Investigator Program award, an Intel Early Career Faculty Honor Program award, an NSF CAREER award, a DARPA Young Faculty Award, and an IEEE Micro Top Picks selection. My teaching has been recognized with the Ruth and Joel Spira Award for Excellence in Teaching, two Michael Tien '72 Excellence in Teaching Awards, and a James M. and Marsha D. McCormick Award for Outstanding Advising of First-Year Engineering Students.
In 2018, I was a Visiting Scholar at the Computer Laboratory at the University of Cambridge and a Visiting Fellow at Clare Hall in Cambridge, UK. Prior to joining Cornell University, I received my Ph.D. in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology. From 2007 to 2009, I was a visiting scholar in the Parallel Computing Laboratory at the University of California at Berkeley; I received an M.Phil. in Engineering as a Churchill Scholar at the University of Cambridge in 2000, and received a B.S. in Electrical Engineering as a Jefferson Scholar at the University of Virginia in 1999.
Recent News
- Jun 2022: Presented our work on using Guix, in computer architecture research at both the gem5 users' workshop and the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) in New York City, NY as part of our open-source software/hardware advocacy broader impact initiative funded through our NSF Panorama grant
- Jun 2022: Research group attended the 48th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA'22) in New York City, NY
- Jun 2022: BRG alumnus Christopher Torng will be starting as an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Southern California in January 2022
- Jun 2022: Attended the final DARPA IDEA/POSH wrap-up meeting in San Diego, CA (with our collaborator Prof. David Wentzlaff at Princeton University) where we presented program outcomes on open-source cache coherent memory systems, open-source synthesizable FPGA generators, open-source on-chip network generators, open-source RTL testing frameworks, and a recent test chip in GF 14nm that served to silicon validate this open-source IP
- May 2022: Our hint to enable more advanced JIT optimizations in PyPy, which was featured in our CGO'20 paper on type freezing, was merged upstream thanks to the hard work of Lin Cheng and our collaborator Carl Friedrich Bolz-Tereick
- May 2022: Invited to help organize the in-person National Science Foundation (NSF) Workshop on Integrated Circuit Research, Education, and Workforce Development held in San Jose, CA
- May 2022: Lakshmi Bolla completed her MEng design project and graduated. Lakshmi is heading to Qualcomm – Congratulations!
- May 2022: Taped out BRGTC5, our fifth computer architecture test chip: a 2x2.5mm chip in TSMC 180nm designed and implemented using PyMTL3 by Jack Brozozowski, Kyle Infantino, and Dilan Lakhani (block diagram, chip plot). The chip includes a RISC-V TinyRV2 five-stage pipelined microcontroller with a 32KB instruction memory, 32KB data memory, 4–8 digital I/Os and a SPI master interface to enable attaching peripherals, low-power sleep mode which wakes up on a digital input, and an SPI minion interface to enable a host computer to test the chip and load programs. The chip used a sophisticated PyMTL3-based pre- and post-silicon testing strategy.
- May 2022: Paper making the case for using Guix to enable reproducible RISC-V software and hardware (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the Sixth Workshop on Computer Archiecture Research with RISC-V (CARRV'22) to be held in conjunction with ISCA-48
- May 2022: Paper making the case for using Guix to solve the gem5 packaging problem (in collaboration with Prof. Pjotr Prins and Prof. Erik Garrison at the University of Tennesse Health Science Center and their team) is accepted to the gem5 users' workshop to be held in conjunction with ISCA-48
- May 2022: Khalid Al-Hawaj, Tuan Ta, and Peitian Pan present posters on their work-in-progress as part of the ADA SRC JUMP center annual symposium
- May 2021: Gave guest lecture in ENGRI 1210 The Computing Technology Inside Your Smartphone on Recent Trends in Computer Engineering
- Mar 2022: Austin Rovinski from the University of Michigan joined the Batten Research Group as a Postdoctoral Associate – Welcome!
- Feb 2022: Invited to serve as the program co-chair (with Jae Lee at the Seoul National University) for the IEEE Micro Top Picks 2023 selection committee (plenty of lead time to prepare!)
- Jan 2022: Course website for ECE 5745 Complex Digital ASIC Design now online
- Dec 2021: Brett Sawka completed his MEng design project and graduated. Brett is heading to STR – Congratulations!
- Dec 2021: Yanghui Ou presented our work on unifying method-based cycle-level modeling and signal-based register-transfer-level modeling at the 58th ACM/IEEE Design Automation Conf. (DAC'21) in San Francisco, CA
- Nov 2021: Article on our NSF Panorama project to explore integrated rack-scale acceleration for computational pangenomics published in the Cornell Chronicle (shorter article) and Cornell ECE News (longer article)
- Oct 2021: Defense Advanced Research Projects Agency (DARPA) proposal to explore realistic nanophotonic system implementation (with our collaborators Al Molnar at Cornell and Keren Bergman at Columbia) is funded through Intel as part of various DARPA programs on both heterogeneous integration and photonic communication
- Oct 2021: Invited to present work on fast RTL simulation and property-based testing in PyMTL3 at IBM
- Oct 2021: Paper on a tensor processing framework for CPU-manycore heterogeneous systems (in collaboration with our colleagues at Cornell and the University of Washington) accepted for publication in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
- Sep 2021: Invited to serve on the program committee for the IEEE Micro Top Picks 2022 special issue
- Sep 2021: National Science Foundation (NSF) proposal to explore integrated rack-scale acceleration for computational pangenomics (with our collaborators Prof. Zhiru Zhang, Adrian Sampson, and Ed Suh at Cornell University, Prof. Michael Taylor at the University of Washington, and Prof. Pjor Prins and Erik Garrison at the University of Tennessee Health-Science Center) is funded as part of the NSF Principles and Practice of Scalable Systems (PPoSS) program
- Aug 2021: Article on this year's CURIE Academy published in the Cornell Chronicle
- Aug 2021: Group of undergraduates, led by Cameron Haire and also including Rohan Agarwal, Kenneth Mao, and Ken Ho successfully tested their TSMC 180nm tapeout using an "at-home COVID-safe" chip testing setup which included a DC power supply, Analog Discovery 2 logic analyzer & pattern generator, USB-to-SPI adapter, and various other electronics prototyping equipment
- Aug 2021: Course website for ECE 2400 / ENGRD 2140 Computer Systems Programming now online
- Aug 2021: Preslav Ivanov joined the Batten Research Group – Welcome!
- Aug 2021: Invited to serve on the program committee for the 49th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA'22)
- Jul 2021: Invited to serve on the national selection committee for the Churchill Scholarship
- Jul 2021: Directed the week-long design experience for CURIE Academy 2021 entitled "Computing at the Edge" as part of the educational outreach initiatives funded through National Science Foundation (NSF) grant
- Jul 2021: Posted architecture/VLSI/EDA postdoctoral researcher opportunity to explore continuous reconfiguration of polymorphic hardware
- Jul 2021: Article on preparations for this year's CURIE Academy which will enable high-school girls to design, build, and test Internet-of-Things devices published in Cornell ECE News
- Jul 2021: Courtney Golden was selected for the prestigious Rawlings Cornell Presidential Research Scholars Program to explore heterogeneous vector/scalar computer architectures for machine learning – Congratulations!
- Jun 2021: Paper on a layout-based evaluation of read/write performance of SOT-MRAM and SOTFET-RAM (in collaboration with Prof. Alyssa Apsel and her students) is accepted to the 47th IEEE European Solid-State Circuits Conf (ESSCIRC'21)
- May 2021: Group of undergraduates, including Rohan Agarwal, Kenneth Mao, Cameron Haire, Ken Ho, and Angela Zou, taped out BRGTC3 and BRGTC4, our third and fourth computer architecture test chips. BRGTC3 had a hold-time violation (valuable learning experience!). BRGTC4 is a 2x2.5mm chip in TSMC 180nm and includes an SPI interface, UC Berkeley floating-point multiply-add unit, and a standard-cell-based digital clock generator and will lay the foundation for more undergraduate-led research test chips
- May 2021: Invited to present our vision for a new era of open-source system-on-chip design, using our work on PyMTL3 and Celerity as case studies, at the Hardware Systems Collective Seminar at the University of California, Santa Cruz, CA
- May 2021: Shunning Jiang successfully defended his doctoral thesis titled "Productive and Extensible Hardware Modeling, Simulation, and Verification Methodologies". Shunning is heading to Huawei – Congratulations!
- May 2021: Rohan Agarwal and Kenneth Mao completed their MEng design project and graduated. Both Rohan and Kenneth are heading to Apple – Congratulations!
- All News
Current Teaching
Educational Outreach Activities
- Curie Academy 2021: Week-Long Design Experience
- ENGRG 1050 Engineering Seminar: Computer Engineering Hands-On Experience
- ENGRG 1060 Explorations in Engineering: Computer Engineering Unit
- Curie Academy 2014: Week-Long Design Experience
Research Group
- Austin Rovinski (Postdoc)
- Khalid Al-Hawaj (MS/PhD)
- Tuan Ta (MS/PhD)
- Lin Cheng (MS/PhD)
- Yanghui Ou (MS/PhD)
- Peitian Pan (MS/PhD)
- Nick Cebry (MS/PhD)
- Preslav Ivanov (MS/PhD)
- Angela Zou (BS/MEng)
- Kyle Infantino (BS/MEng)
- Jack Brozozowski (BS/MEng)
- Dilan Lakhani (BS/MEng)
- Lauren Shen (BS/MEng)
- Anya Prabowo (BS/MEng)
- Courtney Golden (BS)
- Aidan McNay (BS)
- Former Members
Research Sponsors
- National Science Foundation: PPoSS'21, SHF'20/'15, E2CDA'17, CRI'15/'11, XPS'13, EAGER'11, CAREER'12
- Defense Advanced Research Projects Agency: PIPES'21, POSH'18, SDH'18, CRAFT'16, YFA'12
- Air Force Office of Scientific Research: YIP'15
- Semiconductor Research Corporation: JUMP'18, E2CDA'17
- Intel Corporation: research funding and equipment donation
- Facebook: research funding
- NVIDIA: research funding and equipment donation
- Xilinx: research funding and CAD tool donation
- Cornell Engineering Learning Initiatives: undergraduate research funding
- Advanced Micro Devices: undergraduate research funding
- Synopsys, Cadence, Mentor: CAD tool donation
- ARM: physical IP donation
- GitHub, TravisCI, Codecov.io: hosted software donations
Professional Activities
- Conference PC Chair: IEEE Micro TopPicks'23
- Conference PC Member: IEEE Micro TopPicks'22/'16, ISCA'22/'17/'15/'13, MICRO'20/'15
- Conference PC Member: SC'17/'16, HPCA'16, PPoPP'13, ASPLOS'11
- Conference External Reviewer: ISCA, ASPLOS, MICRO, HPCA, DAC, SIGMETRICS
- Conference Organizing Committee Member: HPCA'14
- Workshop PC Member: WDDD'16, GPGPU'16, NOPE'15, WDDD'15, GPGPU'14
- Workshop Co-Organizer: SIGARCH Visioning Workshop on Open and Agile HW Design, WARP'15, WINDS'10
- Tutorial Co-Organizer: PyMTL'19, PyMTL/Pydgin'15
- Associate Editor: IEEE Micro'20–22
- Journal Reviewer: IEEE Micro, CACM, JETCAS, TCAD, TVLSI, TACO, CAL, MICPRO, COMPUTER
- Book Reviewer: Morgan and Claypool Synthesis Lectures on Computer Architecture
- Member: IEEE Computer Society, ACM SIGARCH