Postdoctoral Researcher Opportunity
Project: Flexible On-Chip Network Generator for Cache-Coherent
Location: Cornell University, Ithaca, NY
Adviser: Christopher Batten
Duration: 1-2 years starting fall 2018
The Computer Systems Laboratory at Cornell seeks a postdoctoral researcher to help launch a new project to develop an open-source on-chip network generator for cache-coherent memory systems. The project spans computer architecture and VLSI design.
The postdoc will work within the research group of Professor Christopher Batten in the department of Electrical and Computer Engineering at Cornell University. Prof. Batten received his Ph.D. at MIT and was a co-architect of the Scale VT Processor and published some of the first papers on chip-level silicon-photonic interconnection networks. More recently, the Batten Research Group at Cornell has done pioneering work in the areas of programmable data-parallel accelerators, architectures for task-based parallel programming models with work-stealing runtimes, architectures for fully integrated voltage regulation, and highly productive hardware design methodologies. In the past three years, Prof. Batten's group has published numerous papers in top-tier architecture/EDA/VLSI venues (e.g., ISCA'16, MICRO'17/'18, HOTCHIPS'17, IEEE MICRO'18, DAC'16/'18, TCAD'18) and has been involved in four tapeouts on IBM 130nm, TSMC 16nm/28m/65m. The postdoc will be an integral part of the Batten Research Group and have opportunities to mentor PhD, masters, and undergraduate researchers. The project also includes researchers at Princeton University.
There is increasing excitement about open-source hardware but a lack of high-quality open-source IP available for use in new system-on-chip designs. This is particularly true with respect to scalable cache-coherent memory systems. We are aiming to develop and release a new open-source framework capable of flexibly generating on-chip networks (OCNs) specifically designed for use in scalable cache-coherent memory systems. This framework will be based on our prior work on PyMTL, a Python-based hardware modeling framework well-suited to generating both the on-chip networks and the associated test harnesses from high-level descriptions. While the primary project focuses on this OCN generator, the post-doc will also have opportunities to be involved in a related project developing a highly efficient vector/CGRA hybrid architecture for emerging applications. There is also an option to lead a VLSI test chip in the later stage of the project.
We are seeking recent PhDs in CS or ECE with expertise in architecture and/or VLSI. Researchers with expertise in architecture will be expected to have experience in designing real microarchitectures (e.g., processor design, cache pipeline design) and then modeling these designs using cycle-level simulation frameworks (e.g., gem5). Researchers with expertise in VLSI will be expected to have experience in RTL modeling (e.g., Verilog), ASIC design tools (e.g., logic synthesis, physical design), and tapeouts. Researchers with expertise in one area or the other will fit well; researchers whose interests span architecture and VLSI are ideal. Prior work on on-chip networks is relevant but not required. Good candidates will have a track record of releasing open-source projects.
The position starts in the fall semester of 2018 and lasts for one or two years, depending on the candidate’s preference. The postdoc will work with the PI and students to define the research direction, develop the framework, release the framework as an open-source project, and write papers for relevant conferences. This is a leadership role; there will be opportunities to mentor students and to give talks at companies and other universities. Cornell's Office of Postdoctoral Studies provides significant support to ensure post-docs are successful in meeting their career goals.
We take diversity and inclusion seriously. Cornell is a recognized employer and educator valuing AA/EEO, Protected Veterans, and Individuals with Disabilities.
How to Apply
Send the following materials to Prof. Christopher Batten in PDF format: (1) a cover letter summarizing your relevant research experience, why you are good fit for the position, and how the position relates to your career goals; (2) your CV including a list of all publications; (3) a list of 2–3 references including your PhD research adviser; (4) your undergraduate and graduate transcripts. Applications are due by August 31st, 2018. Late applications may be considered; please reach out to Prof. Batten.