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2009

  • Hardware Authentication Leveraging Performance Limits in Detailed Simulations and Emulations,
    Dan Deng, Andrew H. Chan, G. Edward Suh,
    Proceedings of the 46th Design Automation Conference (DAC'09), July 2009
  • Static Virtual Channel Allocation in Oblivious Routing,
    Keun Sup Shim, Myong Hyon Cho, Michel Kinsy, Tina Wen, G. Edward Suh, and Srinivas Devadas,
    Proceedings of the 3rd ACM/IEEE International Symposium on Networks-on-Chip (NOCS), May 2009
  • Application-Aware Deadlock-Free Oblivious Routing,
    Michel Kinsy, Myong Hyon Cho, Tina Wen, Edward Suh, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA), June 2009

2008

  • Diastolic Arrays: Throughput-Driven Reconfigurable Computing,
    Myong Hyon Cho, Chih-Chi Cheng, Michel Kinsy, G. Edward Suh, and Srinivas Devadas,
    Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD'08), November 10-23, 2008
    [LINK]
  • Design and Implementation of PUF-Based "Unclonable" RFID ICs for Anti-Counterfeiting and Security Applications,
    Srinivas Devadas, G. Edward Suh, Sid Paral, Richard Sowell, Thomas Ziola, and Vivek Khandelwal,
    Proceedings of the IEEE International Conference on RFID, April 16-17, 2008
    [LINK]

2007

  • AEGIS: A Single-Chip Secure Processor,
    G. Edward Suh, Charles W. O'Donnell, and Srinivas Devadas,
    IEEE Design & Test of Computers, vol.24, no.6, pp.570-580, Nov.-Dec. 2007
    [LINK]
  • Memoization Attacks and Copy Protection in Partitioned Applications,
    Charles W. O'Donnell, G. Edward Suh, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the 2007 IEEE Workshop on Information Assurance West Point, NY, June 2007.
    [PDF]
  • Physical Unclonable Functions for Device Authentication and Secret Key Generation (Invited Paper),
    G. Edward Suh, and Srinivas Devadas,
    Proceedings of the 44th Design Automation Conference (DAC'07), San Diego, CA, June 2007.
    [PDF]

2006

  • Speeding up Exponentiation using an Untrusted Computational Resource ,
    Marten van Dijk, Dwaine Clarke, Blaise Gassend, G. Edward Suh, and Srinivas Devadas,
    Designs, Codes and Cryptography, Volume 39, Number 2, Pages 253-273, May 2006
    [PDF]

2005

  • Extracting Secret Keys from Integrated Circuits,
    Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, and Srinivas Devadas
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 13, Issue 10, Pages 1200-1205, October 2005.
    [PDF]
  • AEGIS: A Single-Chip Secure Processor ,
    G. Edward Suh,
    MIT CSAIL CSG-TR-489 (Doctoral Dissertation) , September 2005.
    [PDF]
  • Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions,
    G. Edward Suh, Charles W. O'Donnell, Ishan Sachdev, and Srinivas Devadas,
    Proceedings of the 32nd Annual International Symposium on Computer Architecture
    This memo is a slightly updated version. [PS] [PDF] [SLIDES(PPT)]
  • Towards Constant Bandwidth Overhead Integrity Checking of Untrusted Data,
    Dwaine Clarke, G. Edward Suh, Blaise Gassend, Ajay Sudan, Marten van Dijk and Srinivas Devadas,
    Proceedings of the 2005 IEEE Symposium on Security and Privacy
    This memo is a slightly updated version. [PS] [PDF]

2004

  • Secure Program Execution via Dynamic Information Flow Tracking,
    G. Edward Suh, Jae W. Lee, David X. Zhang, and Srinivas Devadas,
    Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XI), pages 85-96, Boston, MA, October 2004.
    [PS] [PDF] [SLIDES]
  • A Technique to Build a Secret Key in Integrated Circuits for Identification and Authentication Applications,
    Jae W. Lee, Daihyun Lim, Blaise Gassend, G. Edward Suh, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the Symposium on VLSI Circuits, pages 176-179, Honolulu, HI, June 2004.
    [PS] [PDF]
  • Dynamic Partitioning of Shared Cache Memory,
    G. Edward Suh, Larry Rudolph, and Srinivas Devadas,
    The Journal of Supercomputing, 28(1), pages 7-26, April 2004.
    [PDF]

2003

  • Efficient Memory Integrity Verification and Encryption for Secure Processors,
    G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the 36th Annual International Symposium on Microarchitecture (MICRO36), pages 339-350, San Diego, CA, December 2003.
    [PS] [PDF] [SLIDES]
  • Incremental Multiset Hash Functions and Their Application to Memory Integrity Checking,
    Dwaine Clarke, Srinivas Devadas, Marten van Dijk, Blaise Gassend, and G. Edward Suh,
    Proceedings of the 9th International Conference on the Theory and Application of Cryptology and Information Security (Asiacrypt 2003), Lecture Notes in Computer Science (LNCS), Vol. 2894, pages 188-207, Taipei, Taiwan, November 2003.
    [PS] [PDF]
  • The AEGIS Processor Architecture for Tamper-Evident and Tamper-Resistant Processing,
    G. Edward Suh, Blaise Gassend, Dwaine Clarke, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the 17th International Conference on Supercomputing (ICS'03), pages 160-171, San Francisco, CA, June 2003.
    Revised version. [PS] [PDF] [SLIDES]
  • Intelligent SRAM (ISRAM) for Improved Embedded System Performance,
    Prabhat Jain, G. Edward Suh, and Srinivas Devadas,
    Proceedings of the 40th Design Automation Conference (DAC'03), pages 869-874, Anaheim, CA, June 2003.
    [PS] [PDF]
  • Caches and Hash Trees for Efficient Memory Integrity Verification,
    Blaise Gassend, G. Edward Suh, Dwaine Clarke, Marten van Dijk, and Srinivas Devadas,
    Proceedings of the High Performance Computer Architecture 9 (HPCA9), pages 295-306, Anaheim, CA, February 2003.
    [PS] [PDF]

2002

  • A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning,
    G. Edward Suh, Srinivas Devadas, and Larry Rudolph,
    Proceedings of the High Performance Computer Architecture 8 (HPCA8), pages 117-118, Boston, MA, February 2002.
    [PS] [PDF] [SLIDES]

2001

  • Effects of Memory Performance on Parallel Job Scheduling,
    G. Edward Suh, Larry Rudolph, and Srinivas Devadas,
    Proceedings of the 7th International Workshop on Job Scheduling Strategies for for Parallel Processing (JSSPP 2001), Lecture Notes in Computer Science (LNCS), Vol. 2221, pages 116-132, Cambridge, MA, June 2001.
    [PS] [PDF]
  • Dynamic Cache Partitioning for Simultaneous Multithreading Systems,
    G. Edward Suh, Larry Rudolph, and Srinivas Devadas,
    Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS'01), pages 635-641, Anaheim, CA, August 2001.
    Best paper award.
    [PS] [PDF] [SLIDES]
  • Analytical Cache Models with Application to Cache Partitioning,
    G. Edward Suh, Srinivas Devadas, and Larry Rudolph,
    Proceedings of the 15th International Conference on Supercomputing (ICS'01), pages 1-12, Sorrento, Italy, June 2001.
    [PS] [PDF] [SLIDES]

Unrefereed Publications

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