Miscellaneous Handouts

• Course Syllabus
• Next Steps after First Lecture
• Tiny RISC-V Instruction Set Specification
• Lab Assignment Assessment Rubric
• Verilog RTL Usage Rules
• Linux, Git, PyMTL, Verilog Cheat Sheet

Lecture Handouts

• Course Overview
• T01: Fundamental Processor Concepts
• T02: Fundamental Processor Microarchitecture
• T03: Fundamental Memory Concepts
• T04: Fundamental Memory Microarchitecture
• T09: Advanced Processors – Superscalar Execution
• T10: Advanced Processors – Out-of-Order Execution
• T11: Advanced Processors – Register Renaming
• T12: Advanced Processors – Memory Disambiguation
• T13: Advanced Processors – Branch Prediction
• T14: Advanced Processors – Speculative Execution (extra) (extra2)

Section Handouts

Lab Handouts

• Lab 1: Iterative Integer Multiplier (dpath, ctrl)
• Lab 2: Pipelined Processor (dpath)
• Lab 3: Blocking Cache (dpath, ctrl)
• Lab 4: Multicore System (base, alt, cachenet, memnet, datacache)

Tutorials

• Tutorial 1: Linux Development Environment
• Tutorial 2: Git Distributed Version Control System (github)
• Tutorial 4: Verilog Hardware Description Language (github)