Cornell ECE 6775

ECE 6775

High-Level Digital Design Automation

Fall 2023

Overview

Lectures – Tuesday & Thursday 8:40-9:55am, Phillips 403

Instructor – Zhiru Zhang

Office hours – Thursday 4:30-5:30pm, Online

Staff email – ece6775-staff -at- csl.cornell.edu

CMS – https://cmsx.cs.cornell.edu

Ed – https://edstem.org/us/courses/42268

Course Texts

Lecture slides
Ryan Kastner, Janarbek Matai, and Stephen Neuendorffer, Parallel Programming for FPGAs, arXiv, 2018.
Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.

Tue 08/29 – Introduction

Lecture Slides
Readings

Course Syllabus

Thu 08/31 – Hardware Specialization

Lecture Slides
Readings

W. Dally, Y. Turakhia, S. Han. Domain-Specific Hardware Accelerators. CACM 2020.
S. Williams, A. Waterman, D. Patterson. Roofline: An Insightful Visual Performance Model for Multicore Architectures. CACM 2009

Tue 09/05 – C-Based HLS

Lecture Slides
Readings

Kastner, Matai, and Neuendorffer: Ch. 1.1, 1.4, 2.1-2.4

Thu 09/07 – FPGAs

Lecture Slides
Readings

Kastner, Matai, and Neuendorffer: Ch. 1.2-1.3, Ch. 3.5
A. Boutros, V. Betz. FPGA Architecture: Principles and Progression. IEEE CAS-M 2021.

Tue 09/12 – Analysis of Algorithms

Lecture Slides
Readings

De Micheli: Ch. 2.1-2.3

Thu 09/14 – Binary Decision Diagrams (BDDs)

Lecture Slides
Readings

De Micheli: Ch. 2.5.1 & 2.5.2
K. Brace, R. Rudell, and R. Bryant, Efficient Implementation of a BDD Package. Design Automation Conf., 1991.

Fri 09/15 – Lab 1 Due: CORDIC Design

Assignment
Readings

Kastner, Matai, and Neuendorffer: Ch. 3.1-3.3
Xilinx, Inc. Vivado Design Suite User Guide: High-Level Synthesis. Ch. 4: p391-393, p.524-558
(regarding the usage of Vivado HLS Tcl directives and ap_fixed).

Tue 09/19 – Control Flow Graph

Lecture Slides
Readings

F. E. Allen. Control Flow Analysis. Symp. on Compiler Optimization. 1970.

Wed 09/20 – HW 1 Due

Assignment

Thu 09/21 – Static Single Assignment

Lecture Slides
Readings

R. Cytron, et al. An Efficient Method of Computing Static Single Assignment Form. ACM Symp. on Principles of Programming Languages, 1989.

Tue 09/26 – Scheduling 1

Lecture Slides
Readings

De Micheli: Ch. 2.3.4, 5.1–5.4.1
C.-T. Hwang, J.-H. Lee, Y.-C. Hsu. A Formal Approach to the Scheduling Problem in High Level Synthesis. IEEE TCAD, 1991.

Fri 09/29 – Lab 2 Due: Digit Recognition System (Part 1)

Assignment
Readings

J. Kun. K-Nearest-Neighbors and Handwritten Digit Classification.

Thu 09/28 – Scheduling 2

Lecture Slides
Readings

De Micheli: 5.4.2 & 5.4.3
J. Cong and Z. Zhang. An Efficient and Versatile Scheduling Algorithm Based on SDC Formulation. Design Automation Conf., 2006.
S. Dai, G. Liu, and Z. Zhang. A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation. Int'l Symp. on Field-Programmable Gate Arrays, 2018.

Tue 10/03 – Resource Sharing, Pipelining 1

Lecture Slides

Thu 10/05 – Neural Network Tutorial

Lecture Slides
Readings

L. Fei-Fei, J. Johnson, and S. Yeung. Stanford CS231n Convolutional Neural Networks for Visual Recognition.

Friday 10/06 – Lab 3 Due: Digit Recognition System (Part 2)

Tue 10/10 – Fall Break

Thu 10/12 – Pipelining 2

Lecture Slides
Readings

B. R. Rau. Iterative Module Scheduling: An Algorithm for Software Pipelining Loops. Int'l International Symp. on Microarchitecture, 1994.
Z. Zhang and B. Liu. SDC-Based Modulo Scheduling for Pipeline Synthesis. Int'l Conf. on Computer-Aided Design, 2013.

Mon 10/16 – HW 2 Due

Assignment

Tue 10/17 – HLS Design Practice & Midterm Review

Lecture Slides

Thu 10/19 – In-Class Midterm Exam

Open Book, Open Notes

Tue 10/24 – DNN Acceleration on FPGAs

Lecture Slides
Readings

C. Zhang, P. Li, G. Sun, Y. Guan, B. Xiao, and J. Cong. Optimizing FPGA-Based Accelerator Design for Deep Convolutional Neural Networks. Int'l Symp. on Field-Programmable Gate Arrays, 2015.
Y. Zhang, J. Pan, X. Liu, H. Chen, D. Chen, Z. Zhang. FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations. Int'l Symp. on Field-Programmable Gate Arrays, 2021.

Thu 10/26 – Domain-Specific Programming

Lecture Slides
Readings

Y.-H. Lai, Y. Chi, Y. Hu, J. Wang, C. H. Yu, Y. Zhou, J. Cong, and Z. Zhang. HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. Int'l Symp. on Field-Programmable Gate Arrays, 2019.

Tue 10/31 – Project Overview

Lecture Slides
Readings

Y.-H. Lai, E. Ustun, S. Xiang, Z. Fang, H. Rong, and Z. Zhang. Programming and Synthesis for Software-Defined FPGA Acceleration: Status and Future Prospects. ACM Trans. on Reconfigurable Technology and Systems, 2021.

Wed 11/01 – Lab 4 Due: Binarized Neural Networks

Assignment
ZedBoard Usage
Readings

R. Zhao, W. Song, W. Zhang, T. Xing, J.-H. Lin, M. Srivastava, R. Gupta, and Z. Zhang, Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs. Int'l Symp. on Field-Programmable Gate Arrays, 2017.

Thu 11/02 – Project Meetings

Tue 11/07 – Project Meetings

Wed 11/08 – Project Abstract Due

Thu 11/09 – Project Meetings

Tue 11/14 – Project Meetings

Thu 11/16 – Project Meetings

Tue 11/21 – Project Meetings

Thu 11/23 – Thanksgiving

Tue 11/28 – Project Meetings

Thu 11/30 – Project Meetings

Mon 12/11 – Project Presentation

Thu 12/14 – Project Report Due

Guidelines