office: 471B Rhodes Hall, Ithaca, NY 14853
email: mw828 at cornell edu
I am a third-year Ph.D. student in Electrical and Computer engineering advised by Professor Christopher Batten at Cornell University. My primary research interest is programmable accelerator-based architectures.
- Christopher Torng, Moyang Wang, Bharath Sudheendra, Nagaraj Murali, Suren Jayasuriya, Shreesha Srinath, Taylor Pritchard, Robin Ying, and Christopher Batten. "Experiences Using A Novel Python-Based Hardware Modeling Framework For Computer Architecture Test Chips". Poster at the 28th Symposium on High Performance Chips (HotChips-28). Cupertino, CA. August 2016. [pdf,slides,poster]
- Christopher Torng, Moyang Wang, and Christopher Batten. "Asymmetry-Aware Work-Stealing Runtimes". 43rd ACM/IEEE Int'l Symp. on Computer Architecture (ISCA-43). Seoul, Korea. June 2016. [pdf,slides,errata]
- BRGTC1 test chip tapeout (2016) -- BRGTC1 (image) is the BRG research group's first computer architecture test chip. It is a 2x2mm 1.3M-transistor chip in IBM 130nm designed and implemented using our new PyMTL hardware modeling framework. The chip includes a simple pipelined 32-bit RISC processor, custom LVDS clock receiver, 16KB of on-chip SRAM, and application-specific accelerators generated using commercial C-to-RTL high-level synthesis tools. This project was co-lead by Christopher Torng. Other students who worked on this project: Bharath Sudheendra and Nagaraj Murali (physical design), Suren Jayasuriya and Robin Ying (full-custom design), Shreesha Srinath (accelerator design), Mark Buckler (toolflow), and Taylor Pritchard (FPGA emulation).
- Lead Graduate TA - ECE 4750 / CS 4420 Computer Architecture - Fall 2015
- Cornell H.C. Torng Fellowship 2014