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Workshop on the Interaction between Nanophotonic Devices and Systems
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Co-Located with the 43rd Int'l Symposium on Microarchitecture
Sunday, December 5th, 2010 -- Atlanta, Georgia
http://www.csl.cornell.edu/winds2010

Technology scaling will soon enable high-performance processors with
hundreds of cores integrated onto a single die, but the success of
such systems could be limited by the corresponding chip-level
interconnection networks. Nanophotonic networks are a promising
direction that attempt to provide improved performance, bandwidth
density, and energy efficiency compared to projected electrical
networks. There has recently been significant progress at the
nanophotonic device level, and there have also been many recent
system-level proposals that explore how to use these devices in
intra- and inter-chip networks. The goal of this workshop is to
bring together device-level and system-level nanophotonic
researchers to talk about their work and to share their experiences
with this emerging technology.

This full-day workshop will be held on Sunday, December 5, 2010,
co-located with MICRO-43 in Atlanta, GA. The workshop will include
short tutorial presentations, invited speakers, keynote, and
presentations selected by the technical program committee based on
extended abstract submissions.

We invite submissions from both device-level and system-level
researchers investigating all aspects of nanophotonic
interconnection networks. We will accept submissions in two
categories: (1) new unpublished work, and (2) a summary of the
system-level implications of a paper previously published or under
review outside traditional computer architecture forums (e.g.,
device, circuit, or CAD communities). Topics of particular interest
include, but are not limited to:

 - Theory and modeling of nanophotonic devices and systems
 - Intra- and inter-chip nanophotonic system designs
 - Nanophotonic technology projections and roadmaps
 - Techniques for mitigating physical design issues such as
    thermal and process variation
 - Computer-aided design (CAD) for nanophotonic systems
 - Experimental device-level characterization and system-level
    implications
 - Prototype nanophotonic systems or experimental test
    infrastructure for such systems

*** Submission Details ***

Participants are invited to submit an extended abstract of up to two
pages (single or double column, 10pt, single spaced). Please include
the authors' names, affiliations, and indicate if the submission is
a category 1 or 2 submission. Category 2 submissions should clearly
reference the original publication. Submissions must be in PDF
format and should be emailed to winds2010@csl.cornell.edu by October
15, 2010.

Participants may also include an appendix of any length. However, we
will not promise to read the appendix, so the extended abstract
should stand alone as a coherent description of the work. The
appendix can provide additional details such as device micrographs,
more detailed results, or a copy of the previous publication for
category 2 submissions.

Extended abstracts and presentation slides will only be posted on
the workshop website with permission of the authors. Authors should
feel free to submit work in progress or work under review (where
permitted) without fear of double publication issues.

*** Important Dates ***

 - Submission Deadline: October 15, 2010
 - Notification of Selection: October 29, 2010
 - Final Abstract Submission: November 15, 2010

*** Workshop Committee ***

 - Christopher Batten, Cornell University, Workshop Organizer
 - David Albonesi, Cornell University, PC Chair
 - Jose F. Martinez, Cornell University, PC Chair
 - Nathan Binkert, HP Labs, Program Committee
 - Luca Carloni, Columbia University, Program Committee
 - Ajay Joshi, Boston University, Program Committee
 - Nevin Kirman, Intel Labs, Program Committee
 - Herb Schwetman, Oracle, Sun Labs, Program Committee