Cornell ECE 5775

ECE 5775

High-Level Digital Design Automation

Fall 2022

Overview

Lectures – Tuesday & Thursday 11:25am-12:40pm, Phillips 403

Instructor – Zhiru Zhang

CMS – https://cmsx.cs.cornell.edu

Ed – https://edstem.org/us/courses/24225

Course Texts

Lecture slides
Ryan Kastner, Janarbek Matai, and Stephen Neuendorffer, Parallel Programming for FPGAs, arXiv, 2018.
Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.

Tue 08/23 – Introduction

Lecture Slides
Readings

Course Syllabus

Thu 08/25 – Hardware Specialization

Lecture Slides
Readings

W. Dally, Y. Turakhia, S. Han. Domain-Specific Hardware Accelerators. CACM 2020.
S. Williams, A. Waterman, D. Patterson. Roofline: An Insightful Visual Performance Model for Multicore Architectures. CACM 2009

Tue 08/30 – C-Based HLS

Lecture Slides
Readings

Kastner, Matai, and Neuendorffer: Ch. 1.1, 1.4, 2.1-2.4

Thu 09/01 – FPGAs

Lecture Slides
Readings

Kastner, Matai, and Neuendorffer: Ch. 1.2-1.3, Ch. 3.5
A. Boutros, V. Betz. FPGA Architecture: Principles and Progression. IEEE CAS-M 2021.

Tue 09/06 – Analysis of Algorithms

Lecture Slides
Readings

De Micheli: Ch. 2.1-2.3

Thu 09/08 – Binary Decision Diagrams (BDDs)

Lecture Slides
Readings

De Micheli: Ch. 2.5.1 & 2.5.2
K. Brace, R. Rudell, and R. Bryant, Efficient Implementation of a BDD Package. Design Automation Conf., 1991.

Fri 09/09 – Lab 1 Due: CORDIC Design

Assignment
Readings

Kastner, Matai, and Neuendorffer: Ch. 3.1-3.3
Xilinx, Inc. Vivado Design Suite User Guide: High-Level Synthesis. Ch. 4: p391-393, p.524-558
(regarding the usage of Vivado HLS Tcl directives and ap_fixed).

Tue 09/13 – Control Flow Graph

Lecture Slides
Readings

F. E. Allen. Control Flow Analysis. Symp. on Compiler Optimization. 1970.

Wed 09/14 – HW 1 Due

Assignment

Thu 09/15 – Static Single Assignment

Lecture Slides
Readings

R. Cytron, et al. An Efficient Method of Computing Static Single Assignment Form. ACM Symp. on Principles of Programming Languages, 1989.

Tue 09/20 – Scheduling 1

Lecture Slides
Readings

De Micheli: Ch. 2.3.4, 5.1–5.4.1
C.-T. Hwang, J.-H. Lee, Y.-C. Hsu. A Formal Approach to the Scheduling Problem in High Level Synthesis. IEEE TCAD, 1991.

Fri 09/23 – Lab 2 Due: Digit Recognition System (Part 1)

Assignment
Readings

J. Kun. K-Nearest-Neighbors and Handwritten Digit Classification.

Thu 09/22 – Scheduling 2

Lecture Slides
Readings

De Micheli: 5.4.2 & 5.4.3
J. Cong and Z. Zhang. An Efficient and Versatile Scheduling Algorithm Based on SDC Formulation. Design Automation Conf., 2006.

Tue 09/27 – More Scheduling, Resource Sharing

Lecture Slides
Readings

De Micheli: Ch. 4.3, 6.7
S. Dai, G. Liu, and Z. Zhang. A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation. Int'l Symp. on Field-Programmable Gate Arrays, 2018.

Thu 09/29 – Pipelining 1

Lecture Slides

Mon 10/03 – Lab 3 Due: Digit Recognition System (Part 2)

Tue 10/04 – Pipelining 2

Lecture Slides
Readings

B. R. Rau. Iterative Module Scheduling: An Algorithm for Software Pipelining Loops. Int'l International Symp. on Microarchitecture, 1994.
Z. Zhang and B. Liu. SDC-Based Modulo Scheduling for Pipeline Synthesis. Int'l Conf. on Computer-Aided Design, 2013.

Thu 10/06 – Neural Network Tutorial

Lecture Slides
Readings

L. Fei-Fei, J. Johnson, and S. Yeung. Stanford CS231n Convolutional Neural Networks for Visual Recognition.

Fri 10/07 – HW 2 Due

Assignment

Tue 10/11 – Fall Break

Thu 10/13 – DNN Acceleration on FPGAs

Lecture Slides
Readings

C. Zhang, P. Li, G. Sun, Y. Guan, B. Xiao, and J. Cong. Optimizing FPGA-Based Accelerator Design for Deep Convolutional Neural Networks. Int'l Symp. on Field-Programmable Gate Arrays, 2015.
Y. Zhang, J. Pan, X. Liu, H. Chen, D. Chen, Z. Zhang. FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations. Int'l Symp. on Field-Programmable Gate Arrays, 2021.

Tue 10/18 – In-Class Midterm Exam

Open Book, Open Notes

Thu 10/20 – Domain-Specific Programming

Lecture Slides
Readings

Y.-H. Lai, Y. Chi, Y. Hu, J. Wang, C. H. Yu, Y. Zhou, J. Cong, and Z. Zhang. HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. Int'l Symp. on Field-Programmable Gate Arrays, 2019.

Tue 10/25 – Guest Lecture by Dr. Hongbin Zheng (AWS)

Thu 10/27 – Project Overview

Lecture Slides
Readings

Y.-H. Lai, E. Ustun, S. Xiang, Z. Fang, H. Rong, and Z. Zhang. Programming and Synthesis for Software-Defined FPGA Acceleration: Status and Future Prospects. ACM Trans. on Reconfigurable Technology and Systems, 2021.

Fri 10/28 – Lab 4 Due: Binarized Neural Networks

Assignment
ZedBoard Usage
Readings

R. Zhao, W. Song, W. Zhang, T. Xing, J.-H. Lin, M. Srivastava, R. Gupta, and Z. Zhang, Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs. Int'l Symp. on Field-Programmable Gate Arrays, 2017.

Mon 10/31 – Project Abstract Due

Project Examples: [1] [2] [3] [4] [5]

Tue 11/01 – Project Meetings

Thu 11/03 – Project Meetings

Tue 11/08 – Project Meetings

Thu 11/10 – Project Meetings

Tue 11/15 – Project Meetings

Thu 11/17 – Project Meetings

Tue 11/22 – Project Meetings

Thu 11/24 – Thanksgiving

Tue 11/29 – Project Meetings

Thu 12/01 – Project Meetings

Fri 12/09 – Project Presentation

Guidelines

Wed 12/14 – Project Report Due

Guidelines