Computer Systems Laboratory
365UC Upson Hall
Ithaca, NY 14853
e-mail: paruj AT csl dot cornell dot edu
Note: I graduated in 2009. Now, I am a lecturer at
Dept. of Computer Engineering,
Paruj Ratanaworabhan is a Ph.D. student with the Computer Systems Laboratory (CSL), Cornell University. He received an M.Eng. degree in Electrical and Computer Engineering from Cornell in 2002. After spending a year at Georgia Institute of Technology, he joined the CSL as a Ph.D. student in the fall of 2003. He has since been advised by Martin Burtscher and is currently a visiting student at Institute for Computational Engineering and Sciences, the University of Texas at Austin. His research focus has been on race detection and toleration systems, phase-aware architectures, floating-point data compression, and value-based compiler optimization.
Before coming to the US for graduate study, he was an undergraduate student at Kasetsart University in Thailand and an instrument engineer with Black & Veatch (BV). While at BV, he was part of a team that designed and commissioned control and instrumentation systems in co-generation and coal-fired power plants.
Industrial Research Experience
• Oct. 2008 - Nov. 2008, Consulting Researcher, Microsoft Research Redmond
• Jul. 2008 - Oct. 2008, Research Intern, Microsoft Research Redmond
(All with the Software Design and Implementation Group, Research in Software Engineering (RiSE) Team)
1. Paruj Ratanaworabhan, Benjamin Livshits, and Benjamin Zorn.
“Nozzle: A Defense Against Heap-spraying Code Injection Attacks” [pdf] (Microsoft Research Technical Report [pdf])
18th USENIX Security Symposium (USENIX Security’09), Montreal, Canada, August 2009. (to appear)
2. Martin Burtscher and Paruj Ratanaworabhan.
“pFPC: A Parallel Compressor for Floating-Point Data” [pdf]
2009 Data Compression Conference (DCC’09), Snowbird, Utah, March 2009.
3. Paruj Ratanaworabhan, Martin Burtscher, Darko Kirovski, Rahul Nagpal, Karthik Pattabiraman, and Benjamin Zorn.
“Detecting and Tolerating Asymmetric Races” [pdf]
14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP’09), Raleigh, North Carolina, February 2009.
4. Paruj Ratanaworabhan and Martin Burtscher.
“Program Phase Detection based on Critical Basic Block Transitions” [pdf]
2008 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS’08), Austin, Texas, April 2008.
5. Martin Burtscher and Paruj Ratanaworabhan.
“High Throughput Compression of Double-Precision Floating-Point Data” [pdf]
2007 Data Compression Conference (DCC’07), Snowbird, Utah, March 2007.
6. Paruj Ratanaworabhan and Martin Burtscher.
“Load Instruction Characterization and Acceleration of the BioPerf Programs” [pdf]
2006 IEEE International Symposium on Workload Characterization (IISWC’06), San Jose, California, October 2006.
7. Paruj Ratanaworabhan, Jian Ke, and Martin Burtscher.
“Fast Lossless Compression of Scientific Floating-Point Data” [pdf]
2006 Data Compression Conference (DCC’06), Snowbird, Utah, March 2006.
8. Martin Burtscher and Paruj Ratanaworabhan.
“FPC: A High-Speed Compressor for Double-Precision Floating-Point Data” [pdf]
IEEE Transactions on Computers (IEEE-TC’09), January 2009.
9. Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, and Nana B. Sam.
“The VPC Trace-Compression Algorithms” [pdf]
IEEE Transactions on Computers (IEEE-TC’05), November 2005.