Experience

 
 
 
 
 
June 2017 – December 2017

HPC Architect-Intern, Datacenter Group

Intel Corp.

Worked on power management algorithms for spatial architectures. Specifically, designed algorithms to control di/dt (current spikes) in order to mitigate di/dt-induced supply voltage variation on chip.
 
 
 
 
 
January 2015 – Present
Ithaca, NY

Research Assistant

Cornell University

Working towards improving efficiency of datacenters by smart resource management in servers.

Publications

Cloud multi-tenancy is typically constrained to a single inter- active service colocated with one or more batch, low-priority services, …

Cloud multi-tenancy is typically constrained to a single interactive service colocated with one or more batch, low-priority services, …

Projects

Power Management in Heterogeneous Architectures using Reconfigurable Cores

Building energy-efficient multicore system to tackle the dark silicon problem using assymetric & reconfigurable CPU cores

Way Prediction L1 Cache Design

Developed a RTL implementation of flexible associative cache (using way-prediction) which provides performance similar to set associative cache but energy consumption similar to direct-mapped cache

Acceleration of Critical sections in Multi-Threaded Programs (Master's Thesis, IIT Kanpur)

Building energy-efficient multicore system to tackle the dark silicon problem using assymetric & reconfigurable CPU cores

Teaching

Teaching at Cornell University

  • Head Teaching Assistant, ECE 2300, Digital Logic and Computer Organization, Fall 2018

  • Teaching Assistant, ECE 2300, Digital Logic and Computer Organization, Fall 2015

  • Teaching Assistant, ECE 3140, Embedded Systems, Spring 2015

Teaching at IIT Kanpur

  • Teaching Assistant, EE 370, Digital Electronics & Microprocessor Technology, Spring 2014 (Received Best TA award, Electrical Engineering, 2014-15)

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