Ph.D. '10, Cornell University
mkirman at csl.cornell.edu
I am a research staff member at Intel Labs, Barcelona (Spain) since February 2010. I obtained my Ph.D. under the advising of Prof. José Martínez. My research interests include checkpointed processor architectures, reconfigurable architectures, on-chip interconnect and memory-system design for chip multiprocessors.
I completed BS degrees in Computer Engineering and in Electronics Engineering in 2002 and 2003, respectively, both from Istanbul Technical University (ITU), and joined Cornell's MS/Ph.D. program in Fall 2003. I held a McMullen graduate fellowship during the 2003-04 academic year. I was also a recipient of Intel Research Foundation graduate fellowship between 2006-08.
A. Basu, N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez. Scavenger: A new last level cache architecture with global block priority. In Intl. Symp. on Microarchitecture (MICRO), Chicago, IL, Dec. 2007
E. İpek, M. Kırman, N. Kırman, and J.F. Martínez. Core Fusion: Accommodating software diversity in chip multiprocessors. In Intl. Symp. on Computer Architecture (ISCA), San Diego, CA, June 2007
Earlier version appears in Workshop on Complexity-effective Design, conc. with ISCA, Boston, MA, June 2006
N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi. Leveraging optical technology in bus-based multicore design. In IEEE Micro Top Picks from Computer Architecture Conferences, Jan.-Feb., 2007 - Top Picks
N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi. Leveraging optical technology in future bus-based chip multiprocessors. In Intl. Symp. on Microarchitecture (MICRO), Orlando, FL, Dec. 2006 - Best Paper Nomination
N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez. Checkpointed early load retirement. In Intl. Symp. on High-Performance Computer Architecture (HPCA), San Francisco, CA, Feb. 2005 - Best Paper Award
Early version appears in Wksp. on Value Prediction and Value-based Optimization, conc. with ASPLOS, Oct. 2004
- IBM Austin Research Lab, Novel Systems Architecure Group, May-August 2008, Austin, TX, USA
- Intel Corporation, Architecture Research Lab, June-August 2006, Santa Clara, CA, USA
- Spring 2006 : ECE 572/CS 516 - Parallel Computer Architecture
- Fall 2005 : ECE 475/CS 416 - Computer Architecture
- Fall 2004 : ECE 475/CS 416 - Computer Architecture