| 8:30 9:00 | Breakfast |
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| 9:00 9:15 | Welcome |
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| 9:15 10:15 | Keynote Address (Ted Selker) |
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| 10:15 10:45 | Break |
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| 10:45 12:45 | Session 1: Microarchitecture I (Chair: Shubu Mukherjee) |
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| | "Stack Value File: Custom Microarchitecture for the Stack" |
| | Hsien-Hsin Lee, Smelyanskiy Mikhail, Chris Newburn, and Gary Tyson, University of Michigan and Intel Corp |
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| | "Register Renaming and Scheduling for Dynamic Execution of Predicated Code" |
| | Perry Wang, Hong Wang, Ralph Kling, Kalpana Ramakrishnan, John Shen, and Wen-Hann Wang, Intel |
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| | "Data-flow Prescheduling for Large Instruction Windows in Out-of-Order Processors" |
| | Pierre Michaud and Andrι Seznec, IRISA/INRIA |
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| | "Speculative Data-Driven Multithreading" |
| | Amir Roth and Gurindar Sohi, University of Wisconsin at Madison |
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| 12:45 2:00 | Lunch (Sala Mayor de Rectoria) |
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| 2:00 3:30 | Session 2: Memory Architectures (Chair: John Carter) |
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| | "Towards Virtually-Addressed Memory Hierarchies" |
| | Xiaogang Qiu and Michel Dubois, Sun Microsystems and University of Southern California |
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| | "Reevaluating Superpage Promotion with Hardware Support" |
| | Zhen Fang, Lixin Zhang, John Carter, Wilson Hsieh, and Sally McKee, University of Utah |
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| | "Performance of Hardware Compressed Main Memory" |
| | Bulent Abali, Hubertus Franke, Xiaowei Shen, Dan E. Poff, and T. Basil Smith, IBM T.J. Watson Research Center |
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| 3:30 4:00 | Coffee Break |
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| 4:00 5:30 | Session 3: Multiprocessor Systems (Chair: Steve Lumetta) |
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| | "JETTY: Filtering Snoops for Reduced Power Consumption in SMP Servers" |
| | Andreas Moshovos, Gokhan Memik, Babak Falsafi, and Alok Choudhary, University of Toronto and Carnegie Mellon University |
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| | "A New Scalable Directory Architecture for Large-Scale Multiprocessors" |
| | Manuel Acacio, Jose Gonzalez, Jose Garcia, Jose Duato, Universities of Murcia and Valencia |
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| | "Self-Tuned Congestion Control for Multiprocessor Networks" |
| | Mithuna Thottethodi, Alvin Lebeck, and Shubhendu Mukherjee, Duke University and Compaq Computer Corporation |
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| 5:30 5:45 | Break |
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| 5:45 6:45 | Session 4: Code Generation Techniques (Chair: Mateo Valero) |
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| | "Automatically Mapping Code in an Intelligent Memory Architecture" |
| | Jaejin Lee, Yan Solihin, and Josep Torrellas, Michigan State University, Los Alamos National Laboratory, and University of Illinois at Urbana-Champaign |
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| | "CARS: A New Code Generation Framework for Clustered ILP Processors" |
| | Krishnan Kailas, Kemal Ebcioglu, and Ashok Agrawala, University of Maryland at College Park and IBM T.J.Watson Research Center |
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| 7:00 8:00 | IEEE TCCA Business Meeting (ITESM) |
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| 8:30 10:00 | Conference Reception (Museo Historia de Mexico) |
| 9:00 9:30 | Breakfast |
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| 9:30 10:30 | Invited Lecture |
| | "Performance SPECulations - Benchmarks, Friend or Foe" |
| | Kaivalya Dixit |
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| 10:30 11:00 | Coffee Break |
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| 11:00 12:30 | Session 5: Energy and Thermal Management (Chair: Yale Patt) |
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| | "An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches" |
| | Se-Hyun Yang, Michael Powell, Babak Falsafi, Kaushik Roy, and T. Vijaykumar, Purdue University and Carnegie Mellon University |
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| | "DRAM Energy Management Using Software and Hardware Directed Power Mode Control" |
| | Victor Delaluz, Mahmut Kandemir, Vijaykrishnan N., Anand Sivasubramaniam, and Mary Jane Irwin, Penn State University |
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| | "Dynamic Thermal Management for High-Performance Microprocessors" |
| | David Brooks and Margaret Martonosi, Princeton University |
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| 12:30 2:00 | Lunch (Sala Mayor de Rectoria) |
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| 2:00 3:30 | Session 6: Prediction Techniques (Chair: Lawrence Rauchwerger) |
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| | "Dynamic Prediction of the Critical Performance Path" |
| | Eric Tune, Dongning Liang, Dean Tullsen, and Brad Calder, UCSD |
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| | "Dynamic Branch Prediction with Perceptrons" |
| | Daniel Jimenez and Calvin Lin, University of Texas at Austin |
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| | "Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency" |
| | Bart Goeman, Hans Van Dierendonck, and Koen DeBosschere, Ghent University |
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| 3:30 4:00 | Coffee Break |
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| 4:00 5:30 | Session 7: Application-specific Designs (Chair: Steve Lumetta) |
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| | "DLP + TLP Processors for the Next Generation of Media Workloads" |
| | Jesus Corbal, Roger Espasa, and Mateo Valero, Universitat Politecnica de Catalunya |
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| | "An Architectural Evaluation of Java TPC-W" |
| | Harold Cain, Ravi Rajwar, Morris Marden, and Mikko Lipasti, University of Wisconsin |
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| | "A Programmable Co-processor for Profiling" |
| | Craig Zilles and Gurindar Sohi, University of Wisconsin at Madison |
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| 5:30-5:45 | Break |
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| 5:45 7:30 | Second Annual HPCA Work In Progress Session (Chair: Jose Duato) |
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| 8:00 10:00 | Banquet (ITESM) |
| 8:30 9:00 | Breakfast |
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| 9:00 10:00 | Session 8: Performance Modeling and Analysis (Chair: Sally McKee) |
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| | "A Delay Model for Pipelined Routers" |
| | Li-Shiuan Peh and William Dally, Stanford University |
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| | "Quantifying the Impact of Architectural Scaling on Communication" |
| | Taliver Heath, Samian Kaur, Richard Martin, and Thu Nguyen, Rutgers University |
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| 10:00 10:30 | Coffee Break |
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| 10:30 12:00 | Session 9: Latency Tolerance Techniques (Chair: Josep Torrellas) |
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| | "Call Graph Prefetching for Database Applications" |
| | Murali Annavaram, Jignesh Patel, and Edward Davidson, University of Michigan |
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| | "Branch History Guided Instruction Prefetching" |
| | Viji Srinivasan, Edward Davidson, Gary Tyson, Mark Charney, and Thomas Puzak, University of Michigan and IBM T.J. Watson Research Center |
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| | "Reducing DRAM Latencies with an Integrated Memory Hierarchy Design" |
| | Wei-fen Lin, Steven Reinhardt, and Doug Burger Universities of Michigan and Texas at Austin |
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| 12:00 12:30 | Closing Remarks and Awards |
