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ECE 685: Memory Technologies and Systems
Fall 2007


TR 11:40-12:55pm, 213 Phillips


Many computing systems, ranging from embedded systems to supercomputers, are now memory limited either with respect to latency or bandwidth. This course addresses the reasons behind this memory wall, and covers technologies used to construct modern memory hierarchies. We also discuss interesting designs for memory hierarchy components at all levels, from cache down to DRAM (everything outside the processing core).

Prerequisites

ECE/CS 314 or equivalent
ECE 475 (prerequisite, corequisite, or equivalent from other institution, or permission from instructor)

Instructor

Prof. Sally A. McKee
324 Rhodes Hall
sam at csl dot cornell dot edu

Contact Info

Email: ece685 at csl dot cornell.edu with course questions

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