Miscellaneous Handouts

• Course Syllabus
• Next Steps after First Lecture
• Tiny RISC-V Instruction Set Specification
• Verilog RTL Usage Rules
• Lab Assignment Logistics
• ECE 5740 Position Paper Logistics

Lecture Handouts

• Course Overview
• T01: Processor Concepts (problems)
• T02: Processor Microarchitecture (problems)
• T03: Memory Concepts (problems)
• T04: Memory Microarchitecture (slides) (problems)
• T05: Branch Prediction
• Out-of-Order Processing Example

Quiz Handouts

Section Handouts

• Section 1: Linux Development Environment
• Section 2: RTL Design with Verilog
• Section 3: RTL Testing
• Section 4 and 5: Lab 2 Head Start
• Section 6: Bug-a-palooza! + Problem-based learning
• Section 9: Problem-based learning (diagram)

Lab Handouts

• Lab 1: Iterative Integer Multiplier
• Lab 2: Pipelined Processor (dpath)
• Lab 3: Blocking Cache
• Lab 4: Branch Predictors

Tutorial Handouts

• Tutorial 0: Remote Access to ecelinux
• Tutorial 1: Linux Development Environment
• Tutorial 2: Verilog Hardware Description Language (code)