Biography
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McKee received her bachelor's degree in Computer Science from Yale University (1985), master's from Princeton University (1990), and doctorate from the University of Virginia (1995). Her dissertation advisor is Bill Wulf, with whom she worked on memory systems architecture. Together they coined the now-common term the "memory wall" to describe a situation in which processors are always waiting for memory, and CPU performance is therefore entirely limited by memory performance. Wulf recently returned to Virginia after serving as President of the National Academy of Engineering for 12 years.
Before graduate school, McKee worked for Digital Equipment Corporation and Microsoft Corporation. She has also held internships at Digital Equipment Corporation's Systems Research Center and the former AT&T Bell Labs. McKee worked as a Post-Doctoral Research Associate in the University of Virginia Computer Science Department for a year after graduating (waiting for the chip to come back from fab), and as a Computer Architect at Intel's Microcomputer Research Lab in Oregon for the two following years. During her time at Intel, McKee also taught at the Oregon Graduate Institute and Reed College. She was a Research Assistant Professor at the University of Utah's School of Computing from July 1998 through June 2002, where she worked on the Impulse Adaptable Memory Controller project. She joined Cornell University's Computer Systems Lab within the School of Electrical and Computer Engineering in July 2002.
Her research has focused mainly on analyzing application memory behavior, and designing more efficient memory systems and the software to exploit them. Achieving this broad objective requires developing new underpinnings for system understanding: she and her students are currently developing new approaches to performance analysis, building better and more scalable tools for application analysis and system modeling, designing architectures to enable more comprehensive system analysis, designing efficient memory systems for both parallel and uniprocessor (including embedded) platforms, and automating memory optimizations for adaptive mesh-based codes. This work is based on a unique compiler infrastructure that exploits domain-expert semantic knowledge to enable optimizations that the compiler would otherwise consider unsafe.