José F. Martínez
Fully Refereed Archival Publications
Author key: Cornell, Student
MICRO, Nov. 2008 [PDF]
R. Bitirgen, E. İpek, and J.F. Martínez
Coordinated management of multiple resources in chip multiprocessors: A machine learning approach
In Intl. Symp. on Microarchitecture, Lake Como, Italy, Nov. 2008
ISCA, June 2008 [PDF]
E. İpek, O. Mutlu, J.F. Martínez, and R. Caruana
Self-optimizing memory controllers: A reinforcement learning approach
In Intl. Symp. on Computer Architecture, Beijing, China, June 2008
MICRO, Dec. 2007 [PDF]
A. Basu, N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez
Scavenger: A new last level cache architecture with global block priority
In Intl. Symp. on Microarchitecture, Chicago, IL, Dec. 2007
DSN, June 2007 [PDF]
C.C. LaFrieda, E. İpek, J.F. Martínez, and R. Manohar
Utilizing dynamically coupled cores to form a resilient chip multiprocessor
In Intl. Conf. on Dependable Systems and Networks, Edinburgh, Scotland, June 2007
ISCA, June 2007 [PDF]
E. İpek, M. Kırman, N. Kırman, and J.F. Martínez
Core Fusion: Accommodating software diversity in chip multiprocessors
In Intl. Symp. on Computer Architecture, San Diego, CA, June 2007
Early version appears in Workshop on Complexity-Effective Design, conc. with ISCA, June 2006
IEEE Micro, Jan.-Feb. 2007 [PDF]
Top Picks in Computer Architecture
N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi
Leveraging optical technology in bus-based multicore design
In IEEE Micro Top Picks from Computer Architecture Conferences, Jan.-Feb. 2007
MICRO, Dec. 2006 [PDF]
Best Paper Nomination
N. Kırman, M. Kırman, R.K. Dokania, J.F. Martínez, A.B. Apsel, M.A. Watkins, and D.H. Albonesi
Leveraging optical technology in future bus-based chip multiprocessors
In Intl. Symp. on Microarchitecture, Orlando, FL, Dec. 2006
HPCA, Feb. 2006 [PDF]
J. Li and J.F. Martínez
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
In Intl. Symp. on High-Performance Computer Architecture, Austin, TX, Feb. 2006
ACM TACO, Dec. 2005 [PDF]
J. Li and J.F. Martínez
Power-performance considerations of parallel computing on chip multiprocessors
In ACM Trans. on Architecture and Code Optimization, Vol. 2, No. 4, Dec. 2005
MICRO, Nov. 2005 [PDF]
M. Kırman, N. Kırman, and J.F. Martínez
Cherry-MP: Correctly integrating checkpointed early resource recycling in chip multiprocessors
In Intl. Symp. on Microarchitecture, Barcelona, Spain, Dec. 2005
ISPASS, Mar. 2005 [PDF]
J. Li and J.F. Martínez
Power-performance implications of thread-level parallelism in chip multiprocessors
In Intl. Symp. on Performance Analysis of Systems and Software, Austin, TX, Mar. 2005
Early version appears in Watson Conference on Interaction between Architecture, Circuits, and Compilers, Yorktown Heights, NY, Sep. 2004
HPCA, Feb. 2005 [PDF]
Best Paper Award
N. Kırman, M. Kırman, M. Chaudhuri, and J.F. Martínez
Checkpointed early load retirement
In Intl. Symp. on High-Performance Computer Architecture, San Francisco, CA, Feb. 2005
Early version appears in Workshop on Value Prediction and Value-based Optimization, conc. with ASPLOS, Oct. 2004
ACM TACO, Dec. 2004 [PDF]
A. Cristal, O. Santana, M. Valero, and J.F. Martínez
Toward kilo-instruction processors
In ACM Trans. on Architecture and Code Optimization, Vol. 1, No. 4, Dec. 2004
HPCA, Feb. 2004 [PDF]
J. Li, J.F. Martínez, and M.C. Huang
The thrifty barrier: Energy-efficient synchronization in shared-memory multiprocessors
In Intl. Symp. on High-Performance Computer Architecture, Madrid, Spain, Feb. 2004
IEEE Micro, Nov.-Dec. 2003 [PDF]
Top Picks in Computer Architecture
J.F. Martínez and J. Torrellas
Speculative synchronization: Programmability and performance for parallel codes
In IEEE Micro Top Picks from Microarchitecture Conferences, Nov.-Dec. 2003
IEEE Computer Architecture Letters, Oct. 2003 [PDF]
A. Cristal, J.F. Martínez, J. Llosa, and M. Valero
A case for resource-conscious out-of-order processors
In IEEE Computer Architecture Letters, Vol. 2, Oct. 2003
MICRO, Nov. 2002 [PDF]
J.F. Martínez, J. Renau, M.C. Huang, M. Prvulovic, and J. Torrellas
Cherry: Checkpointed early resource recycling in out-of-order microprocessors
In Intl. Symp. on Microarchitecture, Istanbul, Turkey, Nov. 2002
ASPLOS, Oct. 2002 [PDF]
J.F. Martínez and J. Torrellas
Speculative Synchronization: Applying Thread-Level Speculation to explicitly parallel applications
In Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, Oct. 2002
Early version appears in Workshop on Memory Performance Issues, conc. with ISCA, May 2001
ISCA, June 2000 [PDF]
M. Cintra, J.F. Martínez, and J. Torrellas
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
In Intl. Symp. on Computer Architecture, Vancouver, Canada, June 2000
ICS, June 1999 [PDF]
J.F. Martínez, J. Torrellas, and J. Duato
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
In Intl. Conf. on Supercomputing, Rhodes, Greece, June 1999